Patents Assigned to Innotech Corporation
  • Patent number: 6677880
    Abstract: There is provided a chopper type voltage comparator for comparing a sampled input voltage with a ramp voltage that is changed with a time, in which a bias voltage is changed according to the ramp voltage, and then the bias voltage comes up to a predetermined voltage value that is able to bring the chopper type voltage comparator into a comparing operation state when the ramp voltage becomes substantially equal to the input voltage. Accordingly, a voltage comparator whose consumption power can be suppressed rather than the prior art and an analog/digital-converter using the same can be provided.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: January 13, 2004
    Assignee: Innotech Corporation
    Inventor: Shyuji Yamamoto
  • Patent number: 6677627
    Abstract: A solid state imaging device includes a MOS image sensor of a threshold voltage modulation system employed in a video camera, an electronic camera, an image input camera, a scanner, a facsimile, or the like. The solid state imaging device includes a photo diode formed in a second semiconductor layer of opposite conductivity type in a first semiconductor layer of one conductivity type, and a light signal detecting insulated gate field effect transistor formed in a fourth semiconductor layer of the opposite conductivity type in a third semiconductor layer of one conductivity type adjacent to the photo diode. A carrier pocket is provided in the fourth semiconductor layer and a portion of the first semiconductor layer under the second semiconductor layer is thicker than that portion of the third semiconductor layer under the fourth semiconductor layer.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: January 13, 2004
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6656777
    Abstract: A first buried layer of one conductivity and a first well region of opposite conductivity are formed in a semiconductor layer using a first mask. A second mask is used to form a second buried layer and a second well region of the opposite conductivity and to introduce impurity of the one conductivity type into a surface of the second well to form a channel doped layer of the one conductivity. A high concentration buried layer of the opposite conductivity is formed by introducing opposite conductivity impurity into the second well region using a third mask. A gate insulating film is formed on the semiconductor layer by thermal oxidation. A source region and a drain region of the one conductivity type are formed on the surface of the second well region, on both sides of a gate electrode.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: December 2, 2003
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6545331
    Abstract: Disclosed is a solid state imaging device, comprising: a photodetection diode; and an insulated gate field effect transistor provided adjacent to the photodetection diode for optical signal detection. In this case, a carrier pocket is provided in a second well region, and an element isolation insulating film is formed to isolate adjacent unit pixels from each other. In addition, an element isolation region of an opposite conductivity type is formed to isolate a second semiconductor layer of one conductivity type in such a way as to include the lower surface of the element isolation insulating film and reach a first semiconductor layer.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: April 8, 2003
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6538925
    Abstract: The present invention relates to a dual bit nonvolatile programmable read/write memory containing a semiconductor memory element having one conductivity type semiconductor substrate including at least one convex portion. A pair of opposite conductivity source/drain regions are formed on a surface of the semiconductor substrate an opposing sides of the convex portion, and a first insulating film covers the upper surface of the convex portion. Second insulating films cover the side surfaces of the convex portion and the source/drain regions. A pair of floating gates abut opposing side surfaces of the convex portion and the source/drain regions through the second insulating films. Third insulating films are formed on the floating gates. A control gate covers the upper surface of the convex portion through the first insulating film and the floating gates through the third insulating films.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: March 25, 2003
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6508068
    Abstract: Provision of a chilling system accomplishing a reduction in the amount of energy expended and in energy loss. The chilling system includes a load (H); a chilling circuit (A) for chilling or cooling the load with a refrigerant; a heat-dissipating mechanism (5) for dissipating heat of the refrigerant in the chilling circuit (A) to the outside; a refrigerant tank (8) connected to the chilling circuit (A) via a confluent valve (13); a chiller for maintaining the refrigerant stored in the refrigerant tank (8) at a predetermined temperature; a controller (12) for controlling the degree of valve opening of the confluent valve (13); and a temperature sensor (14) for detecting a temperature of the refrigerant in the chilling circuit (A).
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: January 21, 2003
    Assignee: Innotech Corporation
    Inventor: Yoshio Ohkawara
  • Patent number: 6504194
    Abstract: There is provided a solid state imaging device using a MOS image sensor of a threshold voltage modulation system employed in a video camera, an electronic camera, an image input camera, a scanner, a facsimile, or the like. In configuration, in the solid state imaging device that comprises a photo diode formed in a second semiconductor layer 15a of opposite conductivity type in a first semiconductor layer 12 and 32 of one conductivity type, and a light signal detecting insulated gate field effect transistor formed in a fourth semiconductor layer 15b of opposite conductivity type in a third semiconductor layer 12 of one conductivity type adjacently to the photo diode, a carrier pocket 25 is provided in the fourth semiconductor layer 15b, and a portion of the first semiconductor layer 12, 32 under the second semiconductor layer 15a is thicker than a portion of the third semiconductor layer 12 under the fourth semiconductor layer 15b in a depth direction.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: January 7, 2003
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6476371
    Abstract: Disclosed is a solid state imaging device, comprising a unit pixel 101 including a photo diode 111 and a MOS transistor 112 for optical signal detection provided with a high-density buried layer 25 for storing optically generated charges generated by light irradiation in the photo diode 111, a vertical scanning signal driving scanning circuit 102 for outputting a scanning signal to a gate electrode 19, and a voltage boost scanning circuit 108 for outputting a boosted voltage higher than a power source voltage to a source region 16. In this case, a boosted voltage is applied from the voltage boost scanning circuit 108 to the source region 16, and the optically generated charges stored in the high-density buried layer 25 are swept out from the high-density buried layer 25 by a source voltage and a gate voltage risen by the boosted voltage.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: November 5, 2002
    Assignee: Innotech Corporation
    Inventor: Takashi Miida
  • Patent number: 6448596
    Abstract: The present invention relates to a solid-state imaging device. More specifically, the invention relates to the solid-state imaging device, which uses a MOS image sensor of a threshold voltage modulation system used for a video camera, an electronic camera, an image input camera, a scanner, a facsimile or the like. The solid-state imaging device is constructed in a manner that pixels are arrayed in a matrix form. Each pixel includes: a photo-diode for generating photo-generated charges by light irradiation; and an insulated gate field effect transistor for light signal detection, provided adjacently to the photo-diode, for storing the photo-generated charges beneath a channel region under a gate electrode, and modulating a threshold voltage by the stored photo-generated charges to detect a light signal. The gate electrodes are disposed at at least four directions around a periphery of the photo-diode, and the photo-diodes are disposed at at least four directions around a periphery of the gate electrode.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: September 10, 2002
    Assignee: Innotech Corporation
    Inventors: Kazuhiro Kawajiri, Takashi Miida
  • Patent number: 6423958
    Abstract: The solid state imaging device comprises a solid state imaging element for storing light generating charges in a high concentration buried layer under a channel, modulating a threshold voltage, and detecting a light signal, a signal output circuit 105 for outputting a difference voltage between a first source potential after light modulation and a second source potential before the light modulation, wherein the signal output circuit 105 stores the first source potential and the second source potential in a first line memory (Lms) and a second line memory (Lmn) each formed of an input capacitor which is connected to a source region of a light signal detecting insulated gate field effect transistor respectively and outputs a difference voltage (Vout=VoutS−VoutN) between the first source potential and the second source potential via switched capacitor circuits.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: July 23, 2002
    Assignee: Innotech Corporation
    Inventors: Seishi Okamoto, Takashi Miida
  • Publication number: 20020066280
    Abstract: Provision of a chilling system accomplishing a reduction in the amount of energy expended and in energy loss. The chilling system includes a load (H); a chilling circuit (A) for chilling or cooling the load with a refrigerant; a heat-dissipating mechanism (5) for dissipating heat of the refrigerant in the chilling circuit (A) to the outside; a refrigerant tank (8) connected to the chilling circuit (A) via a confluent valve (13); a chiller for maintaining the refrigerant stored in the refrigerant tank (8) at a predetermined temperature; a controller (12) for controlling the degree of valve opening of the confluent valve (13); and a temperature sensor (14) for detecting a temperature of the refrigerant in the chilling circuit (A).
    Type: Application
    Filed: November 29, 2001
    Publication date: June 6, 2002
    Applicant: INNOTECH CORPORATION
    Inventor: Yoshio Ohkawara
  • Patent number: 6389829
    Abstract: An object of the present invention is to provide a temperature control system in a simple constitution as well as be capable of strictly controlling the temperature on the side of the process device of the fluid supplied via the pathway from the chiller device.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: May 21, 2002
    Assignee: Innotech Corporation
    Inventor: Masato Maehashi
  • Publication number: 20020054512
    Abstract: The present invention relates to a dual bit nonvolatile programmable read/write memory.
    Type: Application
    Filed: October 29, 2001
    Publication date: May 9, 2002
    Applicant: INNOTECH CORPORATION
    Inventor: Takashi Miida
  • Publication number: 20020024071
    Abstract: The present invention relates to a solid-state imaging device. More specifically, the invention relates to the solid-state imaging device, which uses a MOS image sensor of a threshold voltage modulation system used for a video camera, an electronic camera, an image input camera, a scanner, a facsimile or the like. The solid-state imaging device is constructed in a manner that pixels are arrayed in a matrix form. Each pixel includes: a photo-diode for generating photo-generated charges by light irradiation; and an insulated gate field effect transistor for light signal detection, provided adjacently to the photo-diode, for storing the photo-generated charges beneath a channel region under a gate electrode, and modulating a threshold voltage by the stored photo-generated charges to detect a light signal. The gate electrodes are disposed at at least four directions around a periphery of the photo-diode, and the photo-diodes are disposed at at least four directions around a periphery of the gate electrode.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 28, 2002
    Applicant: INNOTECH CORPORATION
    Inventors: Kazuhiro Kawajiri, Takashi Miida
  • Publication number: 20010017381
    Abstract: Disclosed is a solid state imaging device, comprising a unit pixel 101 including a photo diode 111 and a MOS transistor 112 for optical signal detection provided with a high-density buried layer 25 for storing optically generated charges generated by light irradiation in the photo diode 111, a vertical scanning signal driving scanning circuit 102 for outputting a scanning signal to a gate electrode 19, and a voltage boost scanning circuit 108 for outputting a boosted voltage higher than a power source voltage to a source region 16. In this case, a boosted voltage is applied from the voltage boost scanning circuit 108 to the source region 16, and the optically generated charges stored in the high-density buried layer 25 are swept out from the high-density buried layer 25 by a source voltage and a gate voltage risen by the boosted voltage.
    Type: Application
    Filed: January 2, 2001
    Publication date: August 30, 2001
    Applicant: INNOTECH CORPORATION
    Inventor: Takashi Miida
  • Publication number: 20010015468
    Abstract: Disclosed is a method of storing optically generated charges by an optical signal in a solid state imaging device, which is particularly a method of storing optically generated charges by an optical signal in a solid state imaging device using a MOS image sensor of a threshold voltage modulation type, which is used for a video camera, an electronic camera, an image input camera, a scanner, a facsimile or the like.
    Type: Application
    Filed: February 1, 2001
    Publication date: August 23, 2001
    Applicant: INNOTECH CORPORATION
    Inventor: Takashi Miida
  • Patent number: 6271042
    Abstract: A biochip detection system detects and locates samples that are labeled with multiple fluorescent tags and are located on a biochip. This biochip detection system includes a charge coupled device (CCD) sensor, a broad spectrum light source, a lens, a light source filter, and a sensor filter. The CCD sensor comprises two dimensional CCD arrays to simultaneously detect light waves from at least a substantial portion of the biochip. The broad spectrum light source is optically coupled to the CCD sensor and is configured to be utilized with a variety of different fluorescent tags which have differing excitation wavelengths.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: August 7, 2001
    Assignee: Alpha Innotech Corporation
    Inventors: Robert Malcolm Watson, Jr., Haseeb R. Chaudhry, James S. Lee
  • Patent number: 6148626
    Abstract: A chiller apparatus capable of increasing accuracy of temperature control without large-sizing a chiller, to thereby rapidly accommodate to a large variation in temperature of a load and being decreased in size thereof to increase a degree of freedom in selection of conditions under which the apparatus is installed. The chiller apparatus includes a primary circuit including a chiller and a pump for circulating a refrigerant through the primary circuit, a secondary circuit including a pump for circulating, through the secondary circuit, a refrigerant heat-exchanged with the refrigerant of the primary circuit, a buffer tank arranged at the secondary circuit, a load circuit including a pump for circulating a refrigerant through the load circuit to chill a load, and communication flow passages for connecting the secondary circuit and load circuit to each other therethrough. One of the communication flow passages is provided with a valve for controlling a refrigerant flowing through the communication flow passage.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: November 21, 2000
    Assignee: Innotech Corporation
    Inventor: Kazuki Iwamoto
  • Patent number: 5970167
    Abstract: A method and apparatus for analyzing failures in integrated circuits. A first image is obtained using an emission or electron microscope while an integrated circuit is operating under a first set of conditions. The image is integrated for improved resolution with a camera in front of the microscope screen or with a digitizer coupled to receive video signals from the microscope. The first image is digitized and stored in a first channel of an RGB digitizer board and displayed on a display screen. A second image is obtained in the same way and is digitized and stored in a second channel of the RGB digitizer board and displayed on the display screen. The remaining channel of the RGB digitizer board is coupled to receive live images. The resulting combined image appears as a black and white image so long as the images are aligned. Any differences between the three images will appear conspicuously in color. The input logic levels to the integrated circuit are changed.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: October 19, 1999
    Assignee: Alpha Innotech Corporation
    Inventor: James Barry Colvin
  • Patent number: 5914525
    Abstract: A semiconductor device is disclosed, comprising an integrated circuit formed on an upper surface of a semiconductor wafer chip and inductance formed on sides of the semiconductor wafer chip.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: June 22, 1999
    Assignee: Innotech Corporation
    Inventors: Minoru Yoshida, Yasuhiko Nishikubo