Patents Assigned to Innovium, Inc.
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Patent number: 12101260Abstract: When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.Type: GrantFiled: February 10, 2023Date of Patent: September 24, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan, Ajit Kumar Jain
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Patent number: 12081444Abstract: Packet-switching operations in a network device are managed based on the detection of excessive-rate traffic flows. A network device receives a data unit, determines the traffic flow to which the data unit belongs, and updates flow tracking information for that flow. The network device utilizes the tracking information to determine when a rate at which the network device is receiving data belonging to the flow exceeds an excessive-rate threshold and is thus an excessive-rate flow. The network device may enable one or more excessive-rate policies on an excessive-rate traffic flow. Such a policy may include any number of features that affect how the device handles data units belonging to the flow, such as excessive-rate notification, differentiated discard, differentiated congestion notification, and reprioritization. Memory and other resource optimizations for such flow tracking and management are also described.Type: GrantFiled: April 28, 2023Date of Patent: September 3, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Rupa Budhia, Puneet Agarwal
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Patent number: 12074808Abstract: Distributed machine learning systems and other distributed computing systems are improved by compute logic embedded in extension modules coupled directly to network switches. The compute logic performs collective actions, such as reduction operations, on gradients or other compute data processed by the nodes of the system. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the extension modules may take over some or all of the processing of the distributed system during the collective phase. An inline version of the module sits between a switch and the network. Data units carrying compute data are intercepted and processed using the compute logic, while other data units pass through the module transparently to or from the switch. Multiple modules may be connected to the switch, each coupled to a different group of nodes, and sharing intermediate results. A sidecar version is also described.Type: GrantFiled: November 29, 2022Date of Patent: August 27, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal
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Patent number: 12068972Abstract: A traffic manager is shared amongst two or more egress blocks of a network device, thereby allowing traffic management resources to be shared between the egress blocks. Schedulers within a traffic manager may generate and queue read instructions for reading buffered portions of data units that are ready to be sent to the egress blocks. The traffic manager may be configured to select a read instruction for a given buffer bank from the read instruction queues based on a scoring mechanism or other selection logic. To avoid sending too much data to an egress block during a given time slot, once a data unit portion has been read from the buffer, it may be temporarily stored in a shallow read data cache. Alternatively, a single, non-bank specific controller may determine all of the read instructions and write operations that should be executed in a given time slot.Type: GrantFiled: June 12, 2023Date of Patent: August 20, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
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Patent number: 12019606Abstract: Certain hash-based operations in network devices and other devices, such as mapping and/or lookup operations, are improved by manipulating a hash key prior to executing a hash function on the hash key and/or by manipulating outputs of a hash function. A device may be configured to manipulate hash keys and/or outputs using manipulation logic based on one or more predefined manipulation values. A similar hash-based operation may be performed by multiple devices within a network of computing devices. Different devices may utilize different predefined manipulation values for their respective implementations of the manipulation logic. For instance, each device may assign itself a random mask value for key transformation logic as part of an initialization process when the device powers up and/or each time the device reboots. In an embodiment, described techniques may increase the entropy of hashing function outputs in certain contexts, thereby increasing the effectiveness of certain hashing functions.Type: GrantFiled: October 1, 2020Date of Patent: June 25, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal
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Patent number: 12021763Abstract: An improved buffer for networking and other computing devices comprises multiple memory instances, each having a distinct set of entries. Transport data units (“TDUs”) are divided into storage data units (“SDUs”), and each SDU is stored within a separate entry of a separate memory instance in a logical bank. One or more grids of the memory instances are organized into overlapping logical banks. The logical banks are arranged into views. Different destinations or other entities are assigned different views of the buffer. A memory instance may be shared between logical banks in different views. When overlapping logical banks are accessed concurrently, data in a memory instance that they share may be recovered using a parity SDU in another memory instance. The shared buffering enables more efficient buffer usage in a network device with a traffic manager shared amongst egress bocks. Example read and write algorithms for such buffers are disclosed.Type: GrantFiled: July 24, 2023Date of Patent: June 25, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal
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Patent number: 11968129Abstract: A network device organizes packets into various queues, in which the packets await processing. Queue management logic tracks how long certain packet(s), such as a designated marker packet, remain in a queue. Based thereon, the logic produces a measure of delay for the queue, referred to herein as the “queue delay.” Based on a comparison of the current queue delay to one or more thresholds, various associated delay-based actions may be performed, such as tagging and/or dropping packets departing from the queue, or preventing addition enqueues to the queue. In an embodiment, a queue may be expired based on the queue delay, and all packets dropped. In other embodiments, when a packet is dropped prior to enqueue into an assigned queue, copies of some or all of the packets already within the queue at the time the packet was dropped may be forwarded to a visibility component for analysis.Type: GrantFiled: April 28, 2023Date of Patent: April 23, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Ajit Kumar Jain
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Patent number: 11949601Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: September 12, 2022Date of Patent: April 2, 2024Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
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Patent number: 11943128Abstract: A switch or other network device may be configured as an ingress edge telemetry node in a telemetry domain. The ingress edge telemetry node may clone certain data units it processes, for example in response to certain telemetry triggers being met. The ingress edge telemetry node may further inject telemetry and/or other data into the cloned data unit. The cloned data unit continues along the same path as the original data unit until it reaches an egress edge telemetry node in the telemetry domain. The second node extracts the telemetry data from the cloned data unit and sends telemetry information based thereon to a telemetry collector, while the original data unit continues to its final destination. Nodes along the path between the first node and the second node may be configured as transit telemetry nodes that insert or otherwise update the telemetry data.Type: GrantFiled: February 10, 2023Date of Patent: March 26, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Meg Pei Lin, Rupa Budhia
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Patent number: 11924966Abstract: Loss reduction methods are described. A first transmission loss associated with signal transmission through a trace in a first circuit board design is determined. The trace is routed from an integrated circuit disposed on a circuit board to a circuit element disposed on the circuit board. It is determined that the first transmission loss is greater than a threshold transmission loss. The first circuit board design is altered to obtain a second circuit board design. In the second circuit board design, the trace is routed from the integrated circuit to a connector disposed on the circuit board, and the connector is electrically coupled to the circuit element by a cable. A second transmission loss associated with signal transmission between the integrated circuit and the circuit element in the second circuit board design is less than the threshold transmission loss.Type: GrantFiled: August 13, 2021Date of Patent: March 5, 2024Assignee: Innovium, Inc.Inventors: Vittal Balasubramanian, Yongming Xiong, Keith Michael Ring
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Patent number: 11916325Abstract: A circuit system includes a circuit board. An integrated circuit is mounted on the circuit board, the integrated circuit including a plurality of pins. A trace-to-cable connector is mounted on the circuit board, the trace-to-cable connector configured to couple to a first cable of a first cable-type. A cable-to-cable connector is mounted on the circuit board, the cable-to-cable connector configured to couple the first cable to a second cable of a second cable-type. A first plurality of metal traces couple a first subset of the plurality of pins to the trace-to-cable connector.Type: GrantFiled: August 13, 2021Date of Patent: February 27, 2024Assignee: Innovium, Inc.Inventors: Vittal Balasubramanian, Yongming Xiong, Keith Michael Ring
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Patent number: 11888691Abstract: A network device implements a foldable ingress buffer for buffering data units as they are being received. The buffer is organized into a grid of memory banks, having different columns and rows. A Transport Data Unit (“TDU”) is stored interleaved across entries in multiple banks. As each portion of a TDU is received, the portion is written to a different bank of the buffer. In each column of the buffer, a full-sized TDU has portions in a number of rows equal to the number of folds in the buffer. The sum of the bank widths for each row thus needs be no larger than half the maximum TDU size, which further means that the number of columns in the grid of banks may be reduced by at least half compared to non-folded approaches, with little increase in the number of rows, if any, depending on blocking and reading requirements.Type: GrantFiled: July 20, 2020Date of Patent: January 30, 2024Assignee: Innovium, Inc.Inventor: Ajit Kumar Jain
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Patent number: 11888743Abstract: Prefix entries are efficiently stored at a networking device for performance of a longest prefix match against the stored entries. A prefix entry generally refers to a data entry which maps a particular prefix to one or more actions to be performed by a networking device with respect to network packets or other data structures associated with a network packet that matches the particular prefix. In the context of a router networking device handling a data packet, the one or more actions may include, for example, forwarding a received network packet to a particular “next hop” networking device in order to progress the network packet towards its final destination, applying firewall rule(s), manipulating the packet, and so forth. To reduce a total amount of space occupied by a prefix tree in storage, each of the nodes of a prefix tree may be configured to store only an incremental portion of a prefix relative to its parent node.Type: GrantFiled: December 3, 2019Date of Patent: January 30, 2024Assignee: Innovium, Inc.Inventors: Puneet Agarwal, Rupa Budhia, Meg Lin
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Patent number: 11888931Abstract: Efficient scaling of in-network compute operations to large numbers of compute nodes is disclosed. Each compute node is connected to a same plurality of network compute nodes, such as compute-enabled network switches. Compute processes at the compute nodes generate local gradients or other vectors by, for instance, performing a forward pass on a neural network. Each vector comprises values for a same set of vector elements. Each network compute node is assigned to, based on the local vectors, reduce vector data for a different a subset of the vector elements. Each network compute node returns a result chunk for the elements it processed back to each of the compute nodes, whereby each compute node receives the full result vector. This configuration may, in some embodiments, reduce buffering, processing, and/or other resource requirements for the network compute node or network at large.Type: GrantFiled: May 11, 2022Date of Patent: January 30, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
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Patent number: 11863458Abstract: Nodes within a network are configured to adapt to changing path states, due to congestion, node failures, and/or other factors. A node may selectively convey path information and/or other state information to another node by annotating the information into packets it receives from the other node. A node may selectively reflect these annotated packets back to the other node, or other nodes that subsequently receive these annotated packets may reflect them. A weighted cost multipathing selection technique is improved by dynamically adjusting weights of paths in response to feedback indicating the current state of the network topology, such as collected through these reflected packets. In an embodiment, certain packets that would have been dropped may instead be transformed into “special visibility” packets that may be stored and/or sent for analysis. In an embodiment, insight into the performance of a network device is enhanced through the use of programmable visibility engines.Type: GrantFiled: June 21, 2021Date of Patent: January 2, 2024Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal
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Patent number: 11855901Abstract: In response to certain events in a network device, visibility packets may be generated. A visibility packet may be or comprise at least a portion of a packet that is in some way associated with the event, such as a packet that was dropped as a result of an event, or that was in a queue at the time of an event related to that queue. A visibility packet may be tagged or otherwise indicated as a visibility packet. The network device may include one or more visibility samplers through which visibility packets are routed on their way to a visibility queue, visibility subsystem, and/or out of the network device. The samplers allow only a limited sample of the visibility packets that they receive to pass through the sampler, essentially acting as a filter to reduce the amount of visibility packets that will be processed.Type: GrantFiled: July 26, 2021Date of Patent: December 26, 2023Assignee: Innovium, Inc.Inventors: Bruce Hui Kwan, William Brad Matthews, Puneet Agarwal
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Patent number: 11824764Abstract: Automatic load-balancing techniques in a network device are used to select, from a multipath group, a path to assign to a flow based on observed state attributes such as path state(s), device state(s), port state(s), or queue state(s) of the paths. A mapping of the path previously assigned to a flow or group of flows (e.g., on account of having then been optimal in view of the observed state attributes) is maintained, for example, in a table. So long as the flow(s) are active and the path is still valid, the mapped path is selected for subsequent data units belonging to the flow(s), which may, among other effects, avoid or reduce packet re-ordering. However, if the flow(s) go idle, or if the mapped path fails, a new optimal path may be assigned to the flow(s) from the multipath group.Type: GrantFiled: September 7, 2022Date of Patent: November 21, 2023Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Rupa Budhia
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Patent number: 11805066Abstract: A scheduler in a network device serves ports with data units from a plurality of queues. The scheduler implements a scheduling algorithm that is normally constrained to releasing data to a port no more frequently than at a default maximum service rate. However, when data units smaller than a certain size are at the heads of one or more data unit queues assigned to a port, the scheduler may temporarily increase the maximum service rate of that port. The increased service rate permits fuller realization of a port's maximum bandwidth when handling smaller data units. In some embodiments, increasing the service rate involves dequeuing more than one small data unit at a time, with the extra data units temporarily stored in a port FIFO. The scheduler adds a pseudo-port to its scheduling sequence to schedule release of data from the port FIFO, with otherwise minimal impact on the scheduling logic.Type: GrantFiled: January 4, 2021Date of Patent: October 31, 2023Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Ashwin Alapati
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Patent number: 11784932Abstract: Approaches, techniques, and mechanisms are disclosed for improving operations of a network switching device and/or network-at-large by utilizing queue delay as a basis for measuring congestion for the purposes of Automated Queue Management (“AQM”) and/or other congestion-based policies. Queue delay is an exact or approximate measure of the amount of time a data unit waits at a network device as a consequence of queuing, such as the amount of time the data unit spends in an egress queue while the data unit is being buffered by a traffic manager. Queue delay may be used as a substitute for queue size in existing AQM, Weighted Random Early Detection (“WRED”), Tail Drop, Explicit Congestion Notification (“ECN”), reflection, and/or other congestion management or notification algorithms. Or, a congestion score calculated based on the queue delay and one or more other metrics, such as queue size, may be used as a substitute.Type: GrantFiled: November 6, 2020Date of Patent: October 10, 2023Assignee: Innovium, Inc.Inventors: William Brad Matthews, Bruce Hui Kwan, Puneet Agarwal
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Patent number: 11757801Abstract: An improved buffer for networking and other computing devices comprises multiple memory instances, each having a distinct set of entries. Transport data units (“TDUs”) are divided into storage data units (“SDUs”), and each SDU is stored within a separate entry of a separate memory instance in a logical bank. One or more grids of the memory instances are organized into overlapping logical banks. The logical banks are arranged into views. Different destinations or other entities are assigned different views of the buffer. A memory instance may be shared between logical banks in different views. When overlapping logical banks are accessed concurrently, data in a memory instance that they share may be recovered using a parity SDU in another memory instance. The shared buffering enables more efficient buffer usage in a network device with a traffic manager shared amongst egress bocks. Example read and write algorithms for such buffers are disclosed.Type: GrantFiled: November 2, 2022Date of Patent: September 12, 2023Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal