Abstract: An integrated prototyping system (IPS) is proposed for verifying and validating an electronic system design (ESD) with hierarchical design elements (HDEs). The IPS has: a) A reprogrammable logic device (RPLD) having an emulation timing base and an RPLD-interface for programming and simulating HDEs under validation while transacting exchanging vectors. The RPLD is also switchably coupled to numerous external peripheral electronic devices (PED), b) An EDA simulator for simulating then verifying selected HDEs while transacting exchanging vectors. The EDA simulator also has a simulator interface; and c) An IPS controller bridging the RPLD and the EDA simulator. The IPS controller has an IPS executive for progressively verifying and validating the ESD. The IPS executive further includes a co-emulation software for jointly and simultaneously running the RPLD and the EDA simulator with an event-based synchronization scheme for interchanging exchanging vectors on demand between the RPLD and the EDA simulator.

Abstract: A method for prototyping and validating a customer's electronic system design (ESD) with design data is proposed. The design data is partitioned into hierarchical design elements (HDEs) plus their respective test benches. The ESD couples with customer's customer peripheral devices CPDs via their peripheral interface terminals PITs thus forming interconnected hierarchical system elements (HSEs) interacting with one another according to a functional validation specification. The HSEs form numerous system hierarchy levels (SHLs). The method includes: a) Providing a reprogrammable logic device (RPLD) with an RPLD-interface and programmable external interfaces PXIFs respectively connected to the PITs. b) Providing a simulation software tool. c) Disabling all PXIFs via RPLD-interface. (For each disabled PXIF, identifying HDEs connected to the PXIF and appending their test benches with stimuli and responses to form appended test benches.