Abstract: Method and system for reducing bit error rate (BER) in a high-speed four-to-one time domain multiplexer are disclosed. In one embodiment of the present invention, a keep-alive current is employed in the latches of a four-to-one multiplexer in order to minimize the BER. By adjusting the keep-alive current of the latches in the datapath of the multiplexer, the latch performance can be optimized, thereby achieving minimum BER. Moreover, better latch performance can immunize the multiplexer against small timing misalignment.
Abstract: A modulator driver design is disclosed that employs a differential pair amplifier coupled to feedback amplifiers through tuning networks. Each tuning network comprises a set of inductors that enables a broadband response while reducing the loading effect of the feedback amplifier. An active load is placed at the output to serve multiple purposes, including: generating a high output swing, enabling a lower power supply voltage, and allowing the entire bias circuit to be monolithically integrated.