Patents Assigned to Inresco, Inc.
  • Patent number: 4987512
    Abstract: A solid state circuit protector is comprised of a coil winding, a latching type Hall effect device, and a solid state switching network including an NPN bipolar junction transistor with a current limiting resistor. Other types of solid state switches can be employed instead of or in addition to the bipolar junction transistor.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: January 22, 1991
    Assignee: Inresco, Inc.
    Inventor: James P. Mulshine
  • Patent number: 4922370
    Abstract: Circuit protectors employing a reed switch or electromechanical switching device, has a primary coil connected in series with it. Two resistors are connected across the switch/device and series connected primary coil. A secondary coil is connected across the load to the juncture of the two resistors. The primary and secondary coils are concentric windings. The switch/device is open when there is no power supplied. Thus, the two resistors and the secondary coil are connected to the load. The values of the two resistors and the secondary coil are chosen so that the coil current increases when the power supply is turned ON. When the load reaches approximately 80% of its full level, the magnetic flux generated by a secondary coil winding is sufficient to cause the switch or device contacts to close. As the load reaches its normal state, the secondary coil continues to hold the contacts closed.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: May 1, 1990
    Assignee: Inresco, Inc.
    Inventors: James P. Mulshine, Michael J. Sakatos
  • Patent number: 4922369
    Abstract: A magnetically operated circuit protector utilizing magnetizable reed contacts, primarily reed switches, in combination with a network of coil windings which results in positive trip and reset action, arc suppression, local and remote trip indication, overcurrent and overvoltage protection, operable in alternating and direct current systems, remote turn-on and turn-off, trip time of 50 to 100 microseconds, miniature size, automatic reset, and especially suitable for protecting sensitive electronic systems and instruments.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: May 1, 1990
    Assignee: Inresco, Inc.
    Inventor: Michael J. Sakatos
  • Patent number: 4495480
    Abstract: A novel approach for mounting electrical components, particularly reed switch type relays, on printed circuit boards to accommodate and positionally match contact pins, which are operatively connected to the component terminals, to a fixed pattern of openings on the printed circuit boards. The method system and apparatus of the invention provide the advantages of a simple, high volume, low cost manufacturing system of components and mounting contact pins while allowing substantial flexibility in the contact pattern. A relay user can optimize a circuit design without requiring a completely custom designed and constructed relay to operatively mate with a given circuit board opening pattern. The contact pin arrangement, i.e.
    Type: Grant
    Filed: December 17, 1981
    Date of Patent: January 22, 1985
    Assignee: Inresco, Inc.
    Inventors: George L. Martin, Howard G. Melick