Patents Assigned to InSilica, Inc.
  • Integrated circuit die having an interference shield
    Patent number: 7151011
    Abstract: A package for housing a device (e.g., an integrated circuit chip or die) includes a Faraday cage. The Faraday cage is at least partially formed in the integrated circuit die. The die includes conductive vias and solder balls surrounding a circuit. The package can be a ball grid array (BGA) package or flip chip package. The package substrate can include a ground plane.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: December 19, 2006
    Assignee: InSilica, Inc.
    Inventors: Guruswami M. Sridharan, Kartik M. Sridharan