Abstract: The system for converting a 50 Hz, 312.5 lines per field video composite input signal into a 60 Hz, 262.5 lines per field video composite output signal includes an A/D converter for converting the entire video input signal into a digital video composite signal. The digital video composite signal is stored in a dual port, FIFO, random access field memory. Write cycle commands are generated by gate array logic (GAL) circuits based upon a color subcarrier signal typical of the 60 Hz, 262.5 line output signal, and a horizontal and vertical field signal based upon the 50 Hz input signal. Read commands for the RAM are generated by the GAL based upon an independently generated 60 cycle (Hz) signal. The GAL also deletes between 15 or 30 video lines from the top of each field based upon a timing relationship from a vertical blanking signal, or in the case of the VCR, the head switch signal and a line count generated from the horizontal sync signal of the video composite input signal.