Abstract: A method and apparatus for sampling an analog input signal and storing digital values in a memory, wherein a sequence of clock pulses is generated at a predetermined frequency and a pseudo-random integer is generated at every sampling pulse. The sequence of clock pulses is divided by the integer to select one last pulse from every series of clock pulses. A sequence of sampling pulses is formed by generating a second pseudo-random integer and delaying the selected clock pulse. An analog input signal at the delayed clock pulse is sampled and converted to a predetermined digital format. The current signal sample value is stored in a memory.