Abstract: There is described an implement for the harvesting of seed-producing plants which is suitable for use with mechanical harvesters and is formed of a chassis which comprises basically a hollow front transverse beam and a structure defined by lateral, base and rear parts and a structure which includes a mesh-covered portion; at least two quill-defining trays arranged at an angle with respect to the horizontal, one alongside the other and with their quills pointing in the direction of advance, they being directly connected in front of the front beam; defining between said trays at least one access passage to a cutting station; a cutting station at the end of each passage and arranged slightly to the rear of the trays on the front beam; on which there is provided a high-speed cutting disk which partially overlaps the respective passage; there being provided, in the vicinity of each cutting station and also borne by the front beam a stalk-impelling mechanism adapted to bring, by impeller elements arranged to move o

Abstract: A programmable logic circuit is formed by at least one gate. The gate is formed by four logic circuits, one being a first exclusive NOR circuit having a first input, a second input and an output. A second exclusive NOR circuit having a first input, a second input and output is provided, the first input of the second exclusive NOR circuit being coupled to the first input of said first exclusive NOR circuit. An AND circuit having a first input, a second input and an output is also provided. The first input of the AND circuit is coupled to the output of the first exclusive NOR circuit and the second input of the AND circuit means is coupled to the output of the second exclusive NOR circuit. A third exclusive NOR circuit having a first input circuit, a second input circuit and an output circuit is provided the first input circuit of the third exclusive NOR circuit is coupled to the output of the AND circuit.

Abstract: A novel built-in notched channel MOS-FET device with an effective channel length smaller than the effective channel length of conventional built-in channel MOS-FET devices. The device comprises an insulating substrate, a semiconductor layer with two n.sup.+ -type regions separated by an n-type region, insulation over the semiconductor region, with an opening in each n.sup.+ -type semiconductor region for metal contacts, a notch in the n-type semiconductor region, at least half of the notch being in the n-type region and touching the boundary between one n.sup.+ -type semiconductor region and the n-type semiconductor region, and a metal contact above the notch, all of the metal contacts functioning as electrodes.