Abstract: An integrated circuit includes first and second arrays of resistors, and a plurality of interface circuits. Each resistor in the first array is electrically coupled between a corresponding first input conductive line among a plurality of first or second input conductive lines, and a corresponding first output conductive line among a plurality of first or second output conductive lines. Each resistor in the second array is electrically coupled between a corresponding second input conductive line among a plurality of second input conductive lines, and a corresponding second output conductive line among a plurality of second output conductive lines. Each interface circuit is electrically coupled between a corresponding first output conductive line and a corresponding second input conductive line. Each interface circuit is configured to receive a signal on the corresponding first output conductive line, and apply an analog voltage corresponding to the signal to the corresponding second input conductive line.
Type:
Grant
Filed:
August 31, 2021
Date of Patent:
December 5, 2023
Assignee:
INTEGRATED CIRCUIT, INTERFACE CIRCUIT AND METHOD