Patents Assigned to Integrated Device Technology, Inc.
  • Publication number: 20190187628
    Abstract: A multi-stop time-to-digital converter (TDC, 110) includes single-stop TDCs (326, 510) connected to output nodes of a ring oscillator (504). Other features and embodiments are also provided.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Applicant: Integrated Device Technology, Inc.
    Inventor: Min CHU
  • Patent number: 10325637
    Abstract: An apparatus includes a plurality of memory devices and a control circuit. The control circuit may be configured to enable a plurality of access modes for the plurality of memory devices. In a one-channel mode, all of the memory devices are accessed using a single selectable channel. In a two-channel mode, a first portion of the plurality of memory devices is accessed using a first channel and a second portion of the plurality of memory devices is accessed using a second channel.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: June 18, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventor: Alejandro F. Gonzalez
  • Patent number: 10320376
    Abstract: A frequency divider system and method includes a split-divisor frequency divider module. The split-divisor frequency divider module receives a clock signal and generates an output signal based on a first divisor and a second divisor. The clock signal and output signal each have rectangular waveforms characterized by a respective frequency and pulse width. The frequency of the output signal is a selectable integer fraction of the frequency of the clock signal, the frequency of the output signal being selected based on a sum of the first and second divisors. The pulse width of the output signal is a selectable integer number of clock cycles, the pulse width of the output signal being selected based on at least one of the first divisor and the second divisor.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: June 11, 2019
    Assignee: Integrated Device Technology, Inc.
    Inventor: Richard Geiss
  • Patent number: 10320234
    Abstract: A wireless power receiver comprises a resonant tank configured to generate an AC power signal responsive to an electromagnetic field, a rectifier configured to receive the AC power signal and generate a DC output power signal, and control logic configured to control the resonant tank to reconfigure and adjust its resonant frequency responsive to a determined transmitter type of a wireless power transmitter. The control logic may operate the wireless power receiver as a multimode receiver having a first mode for a first transmitter type and a second mode for a second transmitter type. The resonant tank may exhibit a different resonant frequency for each of the first mode and the second mode. A method comprises determining a transmitter type for a wireless power transmitter desired to establish a mutual inductance relationship, and adjusting a resonant frequency of a resonant tank of a wireless power receiver.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: June 11, 2019
    Assignee: Integrated Device Technology, Inc.
    Inventor: Ovidiu Aioanei
  • Patent number: 10320381
    Abstract: Sequenced switching mitigates impedance variations and signal reflections during switching events by stepping a switch incrementally through a sequence of different states from a start state to at least one intermediate state to an end state. Various architectures, sequencing and step control techniques may permit any degree of mitigation, including to the point of essentially eliminating impedance glitches. Sequential reconfiguration of the structure and/or parameters of one or more switch branches may permit simplification of related programming and circuitry while increasing the lifespan of components spared from unmitigated current and voltage spikes. Each switch branch being transitioned during a switch event may sequence differently than other branches based on the start state, end state and configuration of each branch.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: June 11, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Kathiravan Krishnamurthi, Jean-Marc Mourant, Olivier Hubert, Shawn Bawell
  • Publication number: 20190170584
    Abstract: Embodiments of the invention relate to a method for producing a color sensor with a sensor characteristic adjusted by three sensor elements that each comprise an element characteristic, and a color filter cooperating with the sensor elements and consisting of color filter elements that each comprise a filter element characteristic, and to a color sensor. Embodiments include a method with which a color sensor with a precisely adjustable sensor characteristic can be produced from several photosensitive elements and from simple filter elements is solved in that the particular filter element characteristics are adjusted in such a manner that they have in cooperation with the respective element characteristic an interim characteristic of the sensor which deviates from the sensor characteristic on the whole, wherein the sensor characteristic is generated from the interim characteristic by a transformation algorithm using transformation parameters.
    Type: Application
    Filed: July 4, 2017
    Publication date: June 6, 2019
    Applicant: Integrated Device Technology, Inc.
    Inventors: Matthias GARZAROLLI, Thomas REICHEL
  • Patent number: 10311940
    Abstract: An apparatus includes a receiver circuit and a data buffer. The receiver circuit may comprise a decision feedback equalizer (DFE). The data buffer circuit may be configured to initialize a condition of the receiver circuit in response to a control signal prior to reception of a command sequence associated with a directed access to a memory system. The control signal generally indicates detection of a non-consecutive clock associated with a start of the command sequence. The data buffer circuit may generate one or more tap enable signals configured to determine a number of clock cycles during which a contribution of one or more taps of the decision feedback equalizer (DFE) are delayed.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: June 4, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Craig DeSimone, Praveen Singh
  • Patent number: 10311926
    Abstract: An apparatus includes a detector circuit and a receiver circuit. The detector circuit may be configured to generate a control signal indicating a start of a plurality of strobe edges in a strobe signal. The receiver circuit may be configured to initialize an equalizer circuit in response to the control signal. The equalizer circuit may be configured to compensate a data signal for crosstalk coupled from the strobe edges to the data signal.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: June 4, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventor: Craig DeSimone
  • Patent number: 10312736
    Abstract: A wireless power transmission system is presented. In some embodiments, a transmission unit includes a first inductor with a center tap, a first end tap, and a second end tap; a pre-regulator coupled to provide current to the center tap; a switching circuit coupled to the first end tap and the second end tap, the switching circuit alternately coupling the first end tap and the second end tap to ground at a frequency; and a resonant circuit magnetically coupled to the first inductor, the resonant circuit wirelessly transmitting power. In some embodiments, the switching circuit can be formed of FETs. The current provided to the center tap can be controlled in response to current sensors.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: June 4, 2019
    Assignee: Integrated Device Technology, Inc.
    Inventor: Mehmet K. Nalbant
  • Patent number: 10312961
    Abstract: An apparatus comprises an input port, an output port, and a resonant receive switch circuit. The resonant receive switch circuit may be coupled between the input port and the output port. The resonant receive switch circuit may comprise a switch and an input matching circuit. When the switch is in a non-conducting state, a signal at the input port is passed to the output port. When the switch is in a conducting state, the signal at the input port is prevented from reaching the output port.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: June 4, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Victor Korol, Roberto Aparicio Joo, Naveen Krishna Yanduru
  • Patent number: 10313565
    Abstract: A technique to perform edge-aware spatial noise filtering that may filter random noise from frames while maintaining the edges in the frames. The technique may include receiving a frame comprising a pint ht of pixels, filtering a subset of the plurality of pixels based on a weighting factor associated with each pixel of the subset of pixels, wherein the weighting factor is at least in part based on a difference in pixel value between the pixel and the individual pixels in the subset, and providing the filtered pixel to an encoder for encoding. Example implementation may include a spatial noise filter to receive an image, the noise level, and configuration parameters, and configured to determine weighting factors of pixels of the image based on differences in pixel values and a set of configuration parameters, and further configured to filter noise from the image based on the weighting factors of the pixels.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 4, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Pavel Novotny, Eric Pearson
  • Patent number: 10313470
    Abstract: A system includes at least one end-node, at least one edge node, and an edge cloud video headend. The at least one end node generally implements a first stage of a multi-stage hierarchical analytics and caching technique. The at least one edge node generally implements a second stage of the multi-stage hierarchical analytics and caching technique. The edge cloud video headend generally implements a third stage of the multi-stage hierarchical analytics and caching technique.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: June 4, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventor: Mohammad S. Akhter
  • Patent number: 10306484
    Abstract: An apparatus includes a transceiver circuit, an antenna and a focus array. The transceiver circuit may have a plurality of fed channels configured to generate a plurality of signals. The antenna may have a plurality of antenna arrays configured to generate one or more beams in response to the signals. Each antenna array may (i) have a plurality of subarrays and (ii) be coupled to the fed channels of the transceiver circuit. The focus array may have a plurality of focal zones configured to reflect the beams into a beam zone. Each beam may be steerable by the antenna to one of the focal zones at a time. The focal zones may redirect the beams to a plurality of locations within the beam zone.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: May 28, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Mohammad S. Akhter, John Bradley Deforge
  • Patent number: 10304520
    Abstract: An apparatus includes a line-termination circuit and a continuous-time linear equalizer circuit. The line-termination circuit may be configured to generate a data signal in response to an input signal. The input signal generally resides in a first voltage domain. The input signal may be single-ended. The data signal may be generated in the first voltage domain. The continuous-time linear equalizer circuit may be configured to generate an intermediate signal by equalizing the data signal relative to a reference voltage. The continuous-time linear equalizer circuit generally operates in a second voltage domain. The first voltage domain may be higher than the second voltage domain.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: May 28, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Yi Xie, Yue Yu
  • Publication number: 20190155738
    Abstract: Scalable Coherent Apparatus and Method have been disclosed. In one implementation a dual directory approach is used to implement scalable coherent accesses in a heterogeneous system.
    Type: Application
    Filed: January 29, 2019
    Publication date: May 23, 2019
    Applicant: Integrated Device Technology, Inc.
    Inventor: Mohammad Shahanshah Akhter
  • Patent number: 10284015
    Abstract: A wireless power transmission system is presented. In some embodiments, a transmission unit includes a first inductor with a center tap, a first end tap, and a second end tap; a pre-regulator coupled to provide current to the center tap; a switching circuit coupled to the first end tap and the second end tap, the switching circuit alternately coupling the first end tap and the second end tap to ground at a frequency; and a resonant circuit magnetically coupled to the first inductor, the resonant circuit wirelessly transmitting power. In some embodiments, the switching circuit can be formed of FETs. The current provided to the center tap can be controlled in response to current sensors.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: May 7, 2019
    Assignee: Integrated Device Technology, Inc.
    Inventor: Mehmet K. Nalbant
  • Patent number: 10277907
    Abstract: Examples of encoders and video encoding are described that include optimizers and techniques for optimizing syntax elements such as transform coefficients. In some examples, multiple color components of a video signal may be jointly optimized by employing a cost calculation using a combination of distortion and/or rate metrics for multiple color components. In some examples, a color transformation may occur and the optimization may take place in a different color domain than encoding. In some examples, distortion metrics used in the cost calculations performed by optimizers are based on structural similarity index.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: April 30, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Krzysztof Hebel, Alexandros Tourapis
  • Patent number: 10261539
    Abstract: An apparatus includes a plurality of independently clocked devices and a low frequency beacon. Each of the plurality of independently clocked devices has a respective local clock generator. The low frequency beacon communicates a low frequency synchronization signal to each of the independently clocked devices. The respective local clock generators of the plurality of independently clocked devices are generally synchronized using the low frequency synchronization signal.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: April 16, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Jagdeep Bal, Ron Wade
  • Patent number: 10264542
    Abstract: An apparatus includes a first independently clocked device and one or more second independently clocked devices. The first independently clocked device may comprise a clock generator. The clock generator may be configured to generate a clock signal. The first independently clocked device may be configured to wirelessly broadcast a synchronization signal based on the clock signal. The one or more second independently clocked devices may each comprise respective clock generators. The one or more second independently clocked devices may (a) be configured to receive the synchronization signal from the first independently clocked device and (b) synchronize the respective clock generators to the clock signal of the first independently clocked device in response to the synchronization signal.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: April 16, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Jagdeep Bal, Elie Ayache, Eduard Van Keulen
  • Patent number: 10264261
    Abstract: Apparatuses and methods for initializing a CABAC state are disclosed herein. An example apparatus may include an encoder configured to receive a macroblock dependent on at least one unencoded macroblock. The encoder may further be configured to receive a plurality of CABAC states and initialize CABAC in accordance with one of the plurality of CABAC states to encode the macroblock prior to the at least one unencoded macroblock being encoded.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: April 16, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Eric C. Pearson, Pavel Novotny