Abstract: A multimode receiver can include on or more of an over-voltage protection circuit or a high frequency mode switch. As such, some embodiments of a multi-mode receiver includes a rectifier; a high frequency circuit coupled to the rectifier; a low frequency circuit coupled to the rectifier; and a switching circuit coupled to disable at least a portion of the low frequency circuit while the multi-mode receiver operates in high frequency mode. In some embodiments, the multimode receiver further includes a high-voltage protection circuit coupled to the high frequency circuit that detunes the high frequency circuit when a high-voltage condition is detected.

Abstract: A system, a circuit, and a method of wireless power transfer using a transmitter and a controller coupled to the transmitter. The controller is configured to perform operations including causing the transmitter to scan a frequency range that includes a maximum frequency and a minimum frequency. The operations further include determining one or more detections based at least on the scan of the frequency range. The detection may include a presence of one or more receivers, an absence of one or more receivers, and/or a presence of a foreign object. The operations include determining one or more further operations based on the one or more detections.

Abstract: In some embodiments, optimizing a coil design is provided. In particular, a method of providing an optimized position locating sensor coil design includes receiving a coil design, the coil design including geometric positions of a transmit coil and geometric positions of receive coils; linearizing one or more of the receive coils; and offset compensating the one or more of the receive coils. The linearization determines a geometric correction array for adjusting the geometric position of one of the receive coils. The offset correction includes determining a geometric shift to shift the geometric position of the one of the receive coils.

Abstract: In accordance with aspects of the present invention, a magnetic secured transmission system is presented. A magnetic secure transmission (MST) system can include a full-bridge driver that includes four transistors configured to regulate current through a coil; and a driving controller coupled to drive the full-bridge driver at a high frequency. In some embodiments, the transistors in the full bridge regulator are driven with a high frequency pulsed-wave modulated (PWM) signal to control the current through the coil. A method of magnetic secured transmission (MST) of MST data according to some embodiments includes receiving the MST data; generating coil data in response to the MST data; driving transistors in a full bridge at a high frequency to drive current through a coil according to the coil data.

Abstract: An electronic lock that interacts with a mobile device is presented. In accordance with some embodiments, an electronic lock includes a wireless power receiver configured to receiver power from a mobile device; a processor coupled to receive power from the wireless power receiver; a memory coupled to the processor and to receive power from the wireless power receiver; a communication unit coupled to the processor and to receive power from the wireless power receiver, the communication unit configured to communicate with the mobile device; and an actuator coupled to the processor and to receive power from the wireless power receiver. The processor executes instructions stored in a memory for authenticating the mobile device, and providing signals to the actuator according to instructions received from the mobile device once it is authenticated. The mobile device provides power to the electronic lock and instructs it to lock or unlock a locking mechanism.

Abstract: An apparatus includes a plurality of memory devices and a control circuit. The control circuit may be configured to operate with the memory devices having a first data width in a first mode and with the memory devices having a second data width in a second mode. The control circuit may be configured to implement two differential data strobe input/output circuits. The differential data strobe input/output circuits each may have driver and termination control inputs that are independently programmable. The differential data strobe input/output circuits may be configured to be connected in parallel when the control circuit is operating in the second mode.

Abstract: An EMI shield for a wireless power transmitter is presented. The EMI shield includes a patterned metallic layer that when positioned over a transmitting coil of the wireless power transmitter capacitively couples to the transmitting coil to capture electromagnetic radiation while allowing magnetic power to pass. In some embodiments, the patterned metallic layer may be a comb filter.

Abstract: A charging system that includes a switching control circuit coupled to four series-coupled MOSFET transistors; a flying capacitor coupled across two of the four series-coupled MOSFET transistors; and node between the two of the four series coupled transistors that couples to an output inductor to form a buck regulator is presented. Embodiments of the charging system can have increased efficiency, can reduce the size and inductance of the output inductor, and can be produced with a low voltage process.

Abstract: An apparatus includes a package and a chip. The package may comprise (i) a plurality of bonding pads, (ii) a plurality of combiner/splitter circuits, and (iii) a plurality of bumps. The bonding pads may be configured to electrically connect the package with a printed circuit board substrate. The combiner/splitter circuits generally connect each of the bonding pads to two respective bumps of the plurality of bumps. The chip is generally disposed in the package. The chip may comprise a plurality of contact pads and a plurality of transceiver channels. Each of the transceiver channels may comprise a radio-frequency input and a radio-frequency output. The radio-frequency input and the radio-frequency output of each transceiver channel are generally connected to respective contact pads of the chip. The respective contact pads of each transceiver channel are generally coupled to a respective bonding pad of the package via the two respective bumps.

Abstract: A multi-stop time-to-digital converter (TDC, 110) includes single-stop TDCs (510) connected to output nodes of a ring oscillator (504). Other features and embodiments are also provided.

Abstract: An apparatus includes a plurality of impedance matching networks, a common port, a first switch circuit and a second switch circuit. The impedance matching networks may be (i) connected in series between an input port and an output port and (ii) configured to generate a power detection signal in response to a radio-frequency signal. The radio-frequency signal may be a transmit signal or a receive signal. The common port may be (i) connected to the impedance matching networks and (ii) connectable to an antenna. The first switch circuit may be configured to switch the input port and a circuit ground potential. The second switch circuit may be configured to switch the output port and the circuit ground potential.

Abstract: In accordance with aspects of the present invention, a wireless power integrated circuit is presented. The wireless power integrated circuit includes a wireless power receiver circuit; a battery charger circuit; and a microprocessor coupled to control the wireless power receiver and the battery charger circuit.

Abstract: An apparatus comprises an input port, an output port, and a resonant receive switch circuit. The resonant receive switch circuit may be coupled between the input port and the output port. The resonant receive switch circuit may comprise a first switch, a second switch, and an input matching circuit. When the first and the second switches are in a non-conducting state, a signal at the input port is passed to the output port. When the first and the second switches are in a conducting state, the signal at the input port is prevented from reaching the output port.

Abstract: A wireless power transmitter comprises a bridge inverter including a first switch and a second switch coupled together with a first switching node therebetween, and a first capacitor coupled to the first switching node. The transmitter further includes control logic configured to control the first switch and the second switch according to an operating frequency to generate an AC power signal from a DC power signal, and a resonant tank operably coupled to the first switching node of the bridge inverter, the resonant tank configured to receive the AC power signal and generate an electromagnetic field responsive thereto. A method for operating the wireless power transmitter and a method for making the wireless power transmitter are also disclosed.

Abstract: An apparatus includes an interface and a plurality of impedance branches. The interface may be configured to receive a data signal and a plurality of selection signals. The plurality of impedance branches may comprise a group of branches and a separated branch. The plurality of impedance branches may be configured to adjust an impedance value and a gain of a data path for the data signal in response to the selection signals. The group of branches may be controlled in response to the selection signals to select the impedance value and a first gain value in a first mode. The separated branch may replace one of the plurality of impedance branches in the group of branches in response to the selection signals to select a second gain value in a second mode.

Abstract: An apparatus includes a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a first code by counting a number of cycles of an input clock signal during a period. The period may be determined by an output clock signal and a second code. The second circuit may be configured to generate a third code by a delta-sigma modulation of the first code. The third circuit may be configured to generate the output clock signal in response to the third code. An accuracy of a frequency of the output clock signal may be determined by a current value of the second code.

Abstract: An apparatus includes a switching circuit and a plurality of registers. The switching circuit may be configured to generate a sequence of pulses in a plurality of control signals in response to a plurality of cycles of an enable signal. The registers may be hardwired as a plurality of subsets. Each of the subsets of the registers may be configured to (a) buffer a plurality of setting values received from a memory and (b) present the setting values from the registers to a plurality of transceiver circuits while a corresponding one of the control signals is in an active state. The transceiver circuits may be updated with the setting values from the registers within a predetermined time.

Abstract: An apparatus includes a continuous-time linear equalizer circuit, a buffer and at least one slicer. The continuous-time linear equalizer circuit may be configured to generate a first intermediate signal by equalizing an input signal relative to a reference voltage. The input signal may be single-ended. The first intermediate signal may be differential. The buffer may be configured to generate a second intermediate signal by delaying the first intermediate signal. The second intermediate signal may be differential. The slicer may be configured to generate an output signal by slicing the second intermediate signal. The output signal may be single-ended.

Abstract: An apparatus includes a plurality of digital phase-locked loops and a time slotted bus. The time slotted bus is configured to couple the plurality of digital phase-locked loops. The plurality of digital phase-locked loops may be configured to exchange parameters between two or more of the plurality of digital phase-locked loops using one or more time slots of the time slotted bus.

Abstract: An inductor is disclosed that includes an arrangement of lobes, each of the lobes in the arrangement of lobes including a generator, the arrangement of lobes interconnected such that, when currents are provided by each generator in the arrangement of lobes, each lobe in the arrangement of lobes produces a magnetic field with a defined polarity relative to the arrangement of lobes. When the arrangement of lobes are appropriately interconnected, the magnetic field from the arrangement of lobes can be canceled.