Patents Assigned to Integrated Materials, Inc.
  • Patent number: 7854974
    Abstract: Tubular silicon members advantageously formed by extrusion from a silicon melt or by fixing together silicon staves in a barrel shape. A silicon-based wafer support tower is particularly useful for batch-mode thermal chemical vapor deposition and other high-temperature processes, especially reflow of silicate glass at above 1200° C. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. The tower parts are preferably pre-coated with silicon nitride or polysilicon prior to chemical vapor deposition of these materials, or with silicon nitride prior to reflow of silica.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: December 21, 2010
    Assignee: Integrated Materials, Inc.
    Inventors: Ranaan Y. Zehavi, James E. Boyle
  • Patent number: 7666513
    Abstract: A method of joining two silicon members, the adhesive used for the method, and the joined product, especially a silicon tower for supporting multiple silicon wafers. A flowable adhesive is prepared comprising silicon particles of size less than 100 ?m and preferably less than 100 nm and a silica bridging agent, such as a spin-on glass. Nano-silicon crystallites of about 20 nm size may be formed by CVD. Larger particles may be milled from virgin polysilicon. If necessary, a retardant such as a heavy, preferably water-insoluble alcohol such as terpineol is added to slow setting of the adhesive at room temperature. The mixture is applied to the joining areas. The silicon parts are assembled and annealed at a temperature sufficient to link the silica, preferably at 900° C. to 1100° C. for nano-silicon but higher for milled silicon.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: February 23, 2010
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Raanan Zehavi, Amnon Chalzel
  • Publication number: 20100009123
    Abstract: Non-production wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. They may have thicknesses of 0.725 to 2 mm and be roughened on both sides. Nitride may be grown on the non-production wafers to a thickness of over 2 ?m without flaking. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. Both sides are ground to introduce sub-surface damage and then oxidized and etch cleaned. An all-silicon hot zone of a thermal furnace, for example, depositing a nitride layer, may include a silicon support tower placed within a silicon liner and supporting the polysilicon non-production wafers with silicon injector tube providing processing gas within the liner.
    Type: Application
    Filed: September 18, 2009
    Publication date: January 14, 2010
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: James E. Boyle, Reese Reynolds, Raanan Y. Zehavi, Robert W. Mytton, Doris Mytton, Tom L. Cadwell
  • Patent number: 7611989
    Abstract: Non-production wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. They may have thicknesses of 0.725 to 2 mm and be roughened on both sides. Nitride may be grown on the non-production wafers to a thickness of over 2 ?m without flaking. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. Both sides are ground to introduce sub-surface damage and then oxidized and etch cleaned. An all-silicon hot zone of a thermal furnace, for example, depositing a nitride layer, may include a silicon support tower placed within a silicon liner and supporting the polysilicon non-production wafers with silicon injector tube providing processing gas within the liner.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: November 3, 2009
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Reese Reynolds, Raanan Y. Zehavi, Robert W. Mytton, Doris Mytton, legal representative, Tom L. Cadwell
  • Publication number: 20080152805
    Abstract: Non-production wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. They may have thicknesses of 0.725 to 2 mm and be roughened on both sides. Nitride may be grown on the non-production wafers to a thickness of over 2 ?m without flaking. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. Both sides are ground to introduce sub-surface damage and then oxidized and etch cleaned. An all-silicon hot zone of a thermal furnace, for example, depositing a nitride layer, may include a silicon support tower placed within a silicon liner and supporting the polysilicon non-production wafers with silicon injector tube providing processing gas within the liner.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 26, 2008
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: James E. BOYLE, Reese REYNOLDS, Raanan Y. ZEHAVI, Robert W. MYTTON, Tom L. CADWELL, Doris MYTTON
  • Publication number: 20080054106
    Abstract: A method of jet milling silicon powder in which silicon pellets are fed into a jet mill producing a gas vortex in which the pellets are entrained and pulverized by collisions with each other or walls of the milling chamber. The chamber walls are advantageously formed of high-purity silicon as are other parts contacting the unground pellets or ground powder. The pellets and chamber parts may be formed of electronic grade silicon but polycrystalline silicon may be used for chamber parts. Additionally, the particle feed tube in which the particles are entrained in a gas flow and the vortex finder operating as the outlet at the center of the vortex may be formed of silicon. The milling and feed gas may be nitrogen supplied from a liquid-nitrogen tank lined with stainless steel. The feed pellets may be formed by chemical vapor deposition.
    Type: Application
    Filed: July 24, 2007
    Publication date: March 6, 2008
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: Ranaan ZEHAVI, James E. BOYLE
  • Publication number: 20070181066
    Abstract: A baffled liner cover supported at the top of a liner surrounding a wafer support tower for semiconductor thermal processing. The cover may present a continuous horizontal surface for preventing particles from falling within the liner but present horizontal extending gas passageways in a baffle assembly to allow the flow of processing gas through the cover. In one embodiment, the baffle assembly includes a cup-shaped member disposed in a central aperture of a top plate having an open top, a continuous bottom, horizontal holes through the sides, and a flange around sides defining a convolute annular passage. Alternatively, the planar top plate may included slanted holes therethrough or vertical holes occupying a small fraction of the surface area. The liner and cover may be composed of quartz, silicon carbide, or preferably silicon.
    Type: Application
    Filed: October 30, 2006
    Publication date: August 9, 2007
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: Tom L. Cadwell, Michael Sklyar
  • Publication number: 20070169701
    Abstract: A tubular member formed of silicon staves and arranged in a circular pattern to form a central bore in which a wafer support tower can be inserted for batch thermal processing in an oven. The staves are formed along an axis with an interlocking keyway structure in which axially extending hooks engage axially extending catches formed in back of the hooks on neighboring staves. An adhesive, such as a silica-forming agent and silicon powder, coat the keyway structure before assembly and is cured after assembly, so as to bond the staves together. A similar structure may be used to form a plate structure from an array of smaller parts with interlocking structure formed between neighboring parts.
    Type: Application
    Filed: September 28, 2006
    Publication date: July 26, 2007
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: Reese REYNOLDS, Michael SKLYAR
  • Publication number: 20070020885
    Abstract: Tubular silicon members advantageously formed by extrusion from a silicon melt or by fixing together silicon staves in a barrel shape. A silicon-based wafer support tower is particularly useful for batch-mode thermal chemical vapor deposition and other high-temperature processes, especially reflow of silicate glass at above 1200° C. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. The tower parts are preferably pre-coated with silicon nitride or polysilicon prior to chemical vapor deposition of these materials, or with silicon nitride prior to reflow of silica.
    Type: Application
    Filed: September 18, 2006
    Publication date: January 25, 2007
    Applicant: INTEGRATED MATERIALS, INC.
    Inventors: Ranaan ZEHAVI, James BOYLE
  • Patent number: 7137546
    Abstract: Tubular silicon members advantageously formed by extrusion from a silicon melt or by fixing together silicon staves in a barrel shape. A silicon-based wafer support tower is particularly useful for batch-mode thermal chemical vapor deposition and other high-temperature processes, especially reflow of silicate glass at above 1200° C. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. The tower parts are preferably pre-coated with silicon nitride or polysilicon prior to chemical vapor deposition of these materials, or with silicon nitride prior to reflow of silica.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: November 21, 2006
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Zehavi, James E. Boyle, Robert W. Mytton
  • Patent number: 7108746
    Abstract: A silicon-based wafer support tower particularly useful for batch-mode thermal chemical vapor deposition. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. The surface roughness may be in the range of 250 to 2500 ?m. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. Tubular silicon members are advantageously formed by extrusion from a silicon melt.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: September 19, 2006
    Assignee: Integrated Materials, Inc.
    Inventors: Ranaan Y. Zehavi, James E. Boyle
  • Patent number: 7083694
    Abstract: A method of joining two silicon members, the adhesive used for the method, and the joined product, especially a silicon tower for supporting multiple silicon wafers. A flowable adhesive is prepared comprising silicon particles of size less than 100 ?m and preferably less than 100 nm and a silica bridging agent, such as a spin-on glass. Nano-silicon crystallites of about 20 nm size may be formed by CVD. Larger particles may be milled from virgin polysilicon. If necessary, a retardant such as a heavy, preferably water-insoluble alcohol such as terpineol is added to slow setting of the adhesive at room temperature. The mixture is applied to the joining areas. The silicon parts are assembled and annealed at a temperature sufficient to link the silica, preferably at 900° C. to 1100° C. for nano-silicon but higher for milled silicon.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: August 1, 2006
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Raanan Zehavi, Amnon Chalzel
  • Patent number: 7074693
    Abstract: A method of joining two silicon members and the bonded assembly in which the members are assembled to place them into alignment across a seam. Silicon derived from silicon powder is plasma sprayed across the seam and forms a silicon coating that bonds to the silicon members on each side of the seam to thereby bond together the members. The plasma sprayed silicon may seal an underlying bond of spin-on glass or may act as the primary bond, in which case through mortise holes are preferred so that two layers of silicon are plasma sprayed on opposing ends of the mortise holes. A silicon wafer tower or boat may be the final product. The method may be used to form a ring or a tube from segments or staves arranged in a circle. Plasma spraying silicon may repair a crack or chip formed in a silicon member.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: July 11, 2006
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Laurence D. Delaney
  • Patent number: 6979659
    Abstract: A process for hydrogen annealing silicon wafers that have been cut from an ingot and polished on both sides, thereby removing crystal originated pits (COPs) in their surface. The wafers are then stacked in a tower having at least support surfaces made from virgin polysilicon, that is, polysilicon form by chemical vapor deposition, preferably from monosilane. The tower may include four virgin polysilicon legs have support teeth slotted at inclined angles along the legs and fixed at their opposed ends to bases. The wafers so supported on the virgin polysilicon towers are annealed in a hydrogen ambient at 1250° C. for 12 hours.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: December 27, 2005
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, James E. Boyle, Laurence D. Delaney
  • Patent number: 6838636
    Abstract: A method of welding two silicon workpieces (20, 22) together into one member without the formation of cracks along the weld. A first method passes current (34, 36) through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. A second method passing current (34) through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: January 4, 2005
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Patent number: 6727191
    Abstract: A process for hydrogen annealing silicon wafers that have been cut from an ingot and polished on both sides, thereby removing crystal originated pits (COPs) in their surface. The wafers are then stacked in a tower having at least support surfaces made from virgin polysilicon, that is, polysilicon form by chemical vapor deposition, preferably from monosilane. The tower may include four virgin polysilicon legs have support teeth slotted along the legs and fixed at their opposed ends to bases. The wafers are supported at four equally distributed points at 0.707 of the wafer radius. The wafers so supported on the virgin polysilicon towers are annealed in a hydrogen ambient at 1250° C. for 12 hours.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: April 27, 2004
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, James E. Boyle, Laurence D. Delaney
  • Patent number: 6617225
    Abstract: A method of fabricating parts of silicon, preferably virgin polysilicon formed by chemical vapor deposition of silane, and assembling them into a complex structure, such as a silicon tower or boat for removably supporting a plurality of silicon wafers during thermal processing. The virgin polysilicon is annealed to above 1025° C. before it is machined into a predetermined shape. After machining, the silicon parts are annealed in an oxygen ambient. The machined parts are then assembled and joined together followed by another anneal of the assembled structure. A preferred embodiment of the tower includes four legs secured on their ends to two bases. A plurality of slots are cut in the legs allowing slidable insertion of the wafers and support for them. The bases may be either virgin poly or monocrystalline silicon and be either integral or composed of multiple parts.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: September 9, 2003
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Y. Zehavi
  • Patent number: 6617540
    Abstract: A silicon wafer process fixture having various silicon members secured together. The fixture may include a plurality of generally elongate silicon support member secured to a generally planar silicon base. The silicon members may be made of monocrystalline silicon, polycrystalline silicon, or virgin polysilicon.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: September 9, 2003
    Assignee: Integrated Materials, Inc.
    Inventor: Raanan Zehavi
  • Patent number: 6583377
    Abstract: Two silicon workpieces (20, 22) welded together into one member without the formation of cracks along the weld. It may be formed by a first method in which current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second forming method, current (34) is passed through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: June 24, 2003
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Patent number: 6455395
    Abstract: A method of fabricating the parts and assembling them into a complex structure, such as a silicon tower or boat for removably supporting a plurality of silicon wafers during thermal processing. A preferred embodiment of the tower includes four legs secured on their ends to two bases. A plurality of slots are cut in the legs allowing slidable insertion of the wafers and support for them. The legs preferably have a rounded wedge shape with a curved front surface of small radius cut with the slots and a back surface that is either flat or curved with a substantially larger radius. Preferably, the legs are machined from virgin polysilicon formed by chemical vapor deposition from silane. The bases may be either virgin poly or monocrystalline silicon and be either integral or composed of multiple parts. Virgin polysilicon is preferably annealed to above 1025° C. before machining. Silicon parts may be joined by applying a spin-on glass between the parts and annealing the assembly.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: September 24, 2002
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Y. Zehavi