Patents Assigned to Integrated Technology Corporation
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Patent number: 10768206Abstract: A method is provided for using a loop-back test device to verify continuity between loop-back probes electrically connected to each other on a probe card, the loop-back test device including a first conductive region electrically connected to a substrate, a second conductive region electrically isolated from the substrate, the second conductive region spaced apart from the first conductive region such that when a first loop-back probe contacts the first conductive region a second loop-back probe contacts the second conductive region, The method includes placing the first loop-back probe in electrical contact with the first conductive region, and placing the second loop-back probe in electrical contact with the second conductive region. Continuity between the substrate and the second conductive region is then measured.Type: GrantFiled: June 21, 2016Date of Patent: September 8, 2020Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, John K. Geist, Daniel Kosecki
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Patent number: 9759763Abstract: A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.Type: GrantFiled: July 27, 2012Date of Patent: September 12, 2017Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, Steve Clauter, David Lohr, Gary Rogers, James Baggiore
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Patent number: 9304147Abstract: A method and circuit for implementing high current capability Kelvin connections and measuring the resistance of the contacts and connections to verify that the conducting path is capable of carrying the high current without damage or degraded performance. Included as well is the means and circuit for efficiently dividing a high current test stimulus current into 2 paths with low losses and voltage drops.Type: GrantFiled: June 27, 2014Date of Patent: April 5, 2016Assignee: Integrated Technology CorporationInventors: Rodney Schwartz, Gary Rogers, Steven Clauter
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Publication number: 20130027067Abstract: A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.Type: ApplicationFiled: July 27, 2012Publication date: January 31, 2013Applicant: INTEGRATED TECHNOLOGY CORPORATIONInventors: Rodney E. Schwartz, Steve Clauter, David Lohr, Gary Rogers, James Baggiore
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Patent number: 7521947Abstract: A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level.Type: GrantFiled: May 23, 2007Date of Patent: April 21, 2009Assignee: Integrated Technology CorporationInventors: Gary Rogers, Steve Clauter, Rodney Schwartz, Taichi Ukai, Joe Lambright, Dave Lohr
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Publication number: 20080290882Abstract: A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level.Type: ApplicationFiled: May 23, 2007Publication date: November 27, 2008Applicant: INTEGRATED TECHNOLOGY CORPORATIONInventors: Gary Rogers, Steve Clauter, Rodney Schwartz, Taichi Ukai, Joe Lambright, Dave Lohr
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Patent number: 5657394Abstract: A system for inspecting integrated circuit probe cards using a video camera positioned to view probe points on the cards from below. A precision movement stage is used to move the video camera into a known position for viewing the probe points. Analysis of the video image and the stage position are used to determine the relative positions of the probe points.Type: GrantFiled: June 4, 1993Date of Patent: August 12, 1997Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, Glenn M. Wirick, Gary B. Rogers
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Patent number: 5563781Abstract: An efficient off-line rectified, high-power, AC-to-DC power supply is provided. High-power factor and minimal circuit size, cost, and complexity are achieved by combining switchmode power converter operation as well as conduction-mode operation. The switchmode power converter is controlled such that only a fraction of the output power is converted by the switchmode power converter. Peak power is efficiently conducted directly from an AC line to a DC output without requiring the operation of the switchmode power converter. Such control method results in high efficiency, yet also maintains a high-power factor with optimally sized, cost-effective switchmode power converter electronics. A complete, self-contained system is provided including a soft-start, full-wave bridge.Type: GrantFiled: November 24, 1993Date of Patent: October 8, 1996Assignee: Integrated Technology CorporationInventors: Steven T. Clauter, Gary M. Orman, Fred Boatwright, Robert Gordon
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Patent number: 5442276Abstract: Apparatus and method for electrically generating mechanical braking torque employs direct field drive incorporating an AC alternator plus a current regulator. The stator windings of the alternator are directly coupled to the field winding via a full wave rectifier and the current regulator. The invention simplifies electrical circuitry for generating braking torque, provides wide dynamic range of torque generation, limits voltages and currents to easily manageable levels, and reduces mechanical drive train requirements. The invention produces a constant power mechanical load from essentially 0 to over 1,000 watts from an alternator of the size typically used for automotive applications.Type: GrantFiled: February 22, 1993Date of Patent: August 15, 1995Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, Steven T. Clauter, Gary M. Orman
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Patent number: 5189360Abstract: Apparatus and method for electrically generating mechanical braking torque employs direct field drive incorporating an AC alternator plus a current regulator. The stator windings of the alternator are directly coupled to the field winding via a full wave rectifier and the current regulator. The invention simplifies electrical circuitry for generating braking torque, provides wide dynamic range of torque generation, limits voltages and currents to easily manageable levels, and reduces mechanical drive train requirements. The invention produces a constant power mechanical load from essentially 0 to over 1,000 watts from an alternator of the size typically used for automotive applications.Type: GrantFiled: March 27, 1989Date of Patent: February 23, 1993Assignee: Integrated Technology CorporationInventors: Rodney E. Schwartz, Steven T. Clauter
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Patent number: 4025800Abstract: A binary divider circuit consisting of a pair of inverters connected in series and a pair of switches connected in series around one of the inverters. The switches are constructed such that they are not open or closed at the same time and a capacitor is connected from the common node between the switches and ground. A resistor is connected from the output of one of the series inverters to the input of the other inverter. The resistor is of a value such that the time constant is associated with the resistor and capacitor.Type: GrantFiled: June 16, 1975Date of Patent: May 24, 1977Assignee: Integrated Technology CorporationInventor: Frank Marion Wanlass