Patents Assigned to Integration Associates, Inc.
  • Publication number: 20100021176
    Abstract: A communication device is disclosed having optical and near-field communication capability. The device includes an optical transceiver circuit fabricated on an integrated circuit die and configured to transmit and receive far field signals. A near field transceiver circuit is also fabricated on the integrated circuit die and is configured to transmit and receive near-field electro-magnetic signals. Control circuitry is provided to selectively enable the optical transceiver circuit and the near field transceiver circuit responsive to an external control signal.
    Type: Application
    Filed: November 15, 2007
    Publication date: January 28, 2010
    Applicant: Integration Associates Inc.
    Inventors: Wayne T. Holcombe, Pavel Konecny, Miroslav Svajda, Jean-Luc Nauleau, Robert Farmer
  • Publication number: 20090322572
    Abstract: A method and circuit are shown for decoding a Manchester encoded data input signal, wherein preamble found, data input, and recovered clock signals are received and a phase of the data input signal stored responsive thereto. A decision time signal alternates state responsive to the recovered clock signal. A switch pulse signal asserts when the decision time signal is active and the stored phase and current phase of the data signal have the same logic value, which is stored and cleared responsive to the recovered clock signal. A data output is decoded from a decision pair of phases responsive to the recovered clock, preamble found and decision time signals. The stored and current phases of the data input signal are selected to be the decision pair when neither the switch pulse signal or stored switch pulse signal are asserted and, otherwise, the stored phase and inverted stored phase are selected.
    Type: Application
    Filed: June 27, 2008
    Publication date: December 31, 2009
    Applicant: Integration Associates Inc.
    Inventor: Sharon David Mutchnik
  • Patent number: 7405613
    Abstract: A circuit and method for differential slope demodulator circuit are shown that utilize amplitude stabilizing of a frequency modulated signal to obtain an amplitude stabilized signal. Also shown is bandpass filtering of the amplitude stabilized signal for a first frequency that is offset by a shift frequency below an intermediate frequency, to obtain a first filtered signal and bandpass filtering the amplitude stabilized signal for a second frequency that is offset by the shift frequency above the intermediate frequency, to obtain a second filtered signal. The circuit and method further operate by detecting an envelope of the first filtered signal to obtain a first envelope signal, detecting an envelope of the second filtered signal to obtain a second envelope signal, and differencing the first and second envelope signals to obtain a demodulated output signal.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: July 29, 2008
    Assignee: Integration Associates Inc.
    Inventor: Hendricus C. De Ruijter
  • Publication number: 20080174383
    Abstract: Matching network circuits and a method are shown for suppressing a harmonic frequency in a matching network. The circuits and method involve impedance matching first and second differential input nodes to a single ended output node using a first reactive impedance selected to pass a resonant frequency. They also involve suppressing a harmonic frequency of a common mode signal presented at the first and second differential input nodes by providing a series resonance from the first and second differential input nodes to a radio frequency ground potential, where the series resonance is selected to pass the harmonic frequency to the radio frequency ground potential.
    Type: Application
    Filed: January 7, 2008
    Publication date: July 24, 2008
    Applicant: Integration Associates Inc.
    Inventors: Attila Zolomy, Peter Onody, Tibor Toro
  • Publication number: 20080107157
    Abstract: A frequency hopping coordinator device scans a plurality of frequencies for request for services messages during an unused time slot in order to detect a request for service preamble on one of the frequencies and, responsive thereto, send a service packet message to an end device from which it received the request for service message on the one frequency. The service packet includes a current frequency sequence value of the coordinator device's pseudo-random number sequence and beacon timing information that indicates when periodic beacon messages occur. An endpoint device sends a request for services message on a first frequency of the plurality of frequencies scanned by the coordinator device that includes a preamble identifiable by the coordinator device. The endpoint device receives the service packet message and, responsive thereto, changes the end point's current frequency sequence value and timing information to match the values sent by the coordinator device.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 8, 2008
    Applicant: Integration Associates Inc.
    Inventor: Hendricus De Ruijter
  • Patent number: 7365953
    Abstract: A circuit and method for emulating a component in a circuit are shown that control a current controlled oscillator with a first current that is proportional to a square of a load current of the component and also charge and discharge a high precision capacitor using the current controlled oscillator. The oscillations of the current controlled oscillator are counted to obtain a count value, which is transformed to a transformed current signal using a predetermined transfer function. The transformed current signal is subtracted from the first current that controls the current controlled oscillator. The transformed current signal is subtracted from a second current that is proportional to a square of the load current to determine whether the count value is incremented or decremented responsive to the oscillations of the current controlled oscillator.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: April 29, 2008
    Assignee: Integration Associates Inc.
    Inventors: Roger Biros, Yeshoda Yedevelly, Patrice Griffon
  • Publication number: 20070260905
    Abstract: A dongle 4 is attached to a USB port 8 of computer 2 through USB connector 6. The dongle in suspend mode wakes periodically, sends a polling signal, and if it receives a response the dongle enters an active mode. In embodiments, the dongle 4 uses an active scan request as the polling signal and receives a beacon frame as a response. When the dongle enters an active mode after receiving a response the dongle then wakes the computer 2 from its suspend mode. The dongle draws minimal current meeting the USB specifications.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 8, 2007
    Applicant: Integration Associates Inc.
    Inventors: Ian Marsden, Adam Leitch
  • Patent number: 7292092
    Abstract: A resonator circuit is shown that is fabricated with substantially identical elements disposed symmetrically along an axis such that the circuit has a linear response to bias current. The alignment of the circuit permits multiple characteristics of the circuit to be calibrated.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: November 6, 2007
    Assignee: Integration Associates Inc.
    Inventor: Hendricus De Ruijter
  • Publication number: 20070158663
    Abstract: An optoisolator device is shown having a die attachment device with a planar surface. A first circuit die has first and second planar surfaces and a first side surface. A receiver circuit and a first photodiode are formed on the first planar surface of the first circuit die, where the first photodiode is electrically coupled to the receiver circuit. The second planar surface of the first circuit die is attached to the planar surface of the die attachment device. A second circuit die has a transmitter circuit that includes a first light emitting diode and is attached to the die attachment device in a position adjacent to the first side surface of the first circuit die. A clear plastic layer is formed on the planar surface of the die attachment device over the first and second circuit dies. An opaque layer may be formed over the clear plastic layer.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 12, 2007
    Applicant: Integration Associates Inc.
    Inventors: Wayne Holcombe, Robert Farmer
  • Publication number: 20070147428
    Abstract: A device, for example a ZigBee device, includes an 802.15.4 MAC layer 4 and a ZigBee networking layer 2. A switch layer 10 is provided, having an interface 12 imitating a MAC layer interface and a database 18. The switch layer 10 is able to parse commands from the ZigBee networking layer 2 and route them if appropriate to an alternative lower layer 14.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 28, 2007
    Applicant: Integration Associates Inc.
    Inventor: Phillip E. Beecher
  • Patent number: 7212068
    Abstract: Disclosed is a filter circuit assembly that includes a filter stage with a variable resistor and a resistor/capacitor (RC) oscillator. A controlling output of the RC oscillator controls the value of the variable resistor. The RC oscillator itself also includes a variable resistor. The controlling output of the RC oscillator also controls the value of the variable resistor of the RC oscillator. The structure of the variable resistor of the filter stage is substantially the same as the structure of the variable resistor of the RC oscillator.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: May 1, 2007
    Assignee: Integration Associates Inc.
    Inventor: Péter Ónody
  • Publication number: 20070024380
    Abstract: A circuit and method for emulating a component in a circuit are shown that control a current controlled oscillator with a first current that is proportional to a square of a load current of the component and also charge and discharge a high precision capacitor using the current controlled oscillator. The oscillations of the current controlled oscillator are counted to obtain a count value, which is transformed to a transformed current signal using a predetermined transfer function. The transformed current signal is subtracted from the first current that controls the current controlled oscillator. The transformed current signal is subtracted from a second current that is proportional to a square of the load current to determine whether the count value is incremented or decremented responsive to the oscillations of the current controlled oscillator.
    Type: Application
    Filed: June 29, 2006
    Publication date: February 1, 2007
    Applicant: Integration Associates Inc.
    Inventors: Roger Biros, Yeshoda Yedevelly, Patrice Griffon
  • Patent number: 7164310
    Abstract: The present invention is directed toward a system and apparatus for digitally controlling a bias control signal for at least one transistor. The present invention provides for software writable registers that control the bias control signal. The present invention further provides for the bias control signal to be temperature compensated based upon a temperature signal and a temperature profile stored in software writable registers. The present invention further provides for software control of the initialization and configuration of the bias control signal through stored program control of the values in the software writable registers.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: January 16, 2007
    Assignee: Integration Associates Inc.
    Inventors: Jean-Luc Nauleau, Janos Erdelyi, William H. McCalpin
  • Patent number: 7164377
    Abstract: A shared voltage reference circuit for a codec is shown that includes a voltage reference circuit for producing a reference voltage. A first sample and hold circuit has a first capacitor coupled to an output of the voltage reference circuit through a first switch controlled by a first phase of a sample clock signal for the codec. A second sample and hold circuit has a second capacitor coupled to the output of the voltage reference circuit through a second switch controlled by a second phase of the sample clock signal. A clock generator circuit generates the first and second phases of the sample clock signal, where the first and second phases are non-overlapping.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: January 16, 2007
    Assignee: Integration Associates Inc.
    Inventors: Vitor Pereira, Paulo Pereira
  • Patent number: 7139391
    Abstract: A hook switch circuit is shown wherein two high-voltage bipolar transistors, a PNP transistor Q1 and a NPN transistor Q2. that are connected in a regenerative feedback manner to form a bi-stable latch. The regenerative structure permits the use of low beta transistors that may be turned on with a low control current, but still conduct a sufficient off-hook current. Also shown is a polarity steering regenerative switch (MP1, MP2) that provides a power supply voltage from a telephone line pair and may be adapted for a polarity signal and can be combined with a current mirror (MP7) to produce a current signal proportional to the line voltage (LV1).
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: November 21, 2006
    Assignee: Integration Associates, Inc.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Publication number: 20060226897
    Abstract: A circuit and method for differential slope demodulator circuit are shown that utilize amplitude stabilizing of a frequency modulated signal to obtain an amplitude stabilized signal. Also shown is bandpass filtering of the amplitude stabilized signal for a first frequency that is offset by a shift frequency below an intermediate frequency, to obtain a first filtered signal and bandpass filtering the amplitude stabilized signal for a second frequency that is offset by the shift frequency above the intermediate frequency, to obtain a second filtered signal. The circuit and method further operate by detecting an envelope of the first filtered signal to obtain a first envelope signal, detecting an envelope of the second filtered signal to obtain a second envelope signal, and differencing the first and second envelope signals to obtain a demodulated output signal.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 12, 2006
    Applicant: Integration Associates Inc.
    Inventor: Hendricus De Ruijter
  • Publication number: 20060229052
    Abstract: A method and circuit for receiving a radio frequency signal by receiving and amplifying the radio frequency signal to produce a received signal and generating first and second clock signals corresponding to first and second channel signals, respectively, of the received signal and multiplying the received signal with the clock signals to obtain the channel signals. Pre-selectivity filtering of the received signal is performed by filtering the first channel using a first impedance, filtering the second channel using a second impedance, and converting the first and second impedances with respect to one another through a first gyrator. Amplitude limiting of the first and second channels is performed to obtain first and second amplitude limited channels. Poly-phase selectivity filtering of the first and second amplitude limited channels is performed to obtain first and second selectivity filtered channels. The selectivity filtered channels are demodulated to obtain a data signal.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 12, 2006
    Applicant: Integration Associates Inc.
    Inventor: Hendricus De Ruijter
  • Publication number: 20060210064
    Abstract: A ring detect circuit is shown that includes a regenerative latch configured to be coupled to a telephone line. The regenerative latch is configured to generate a fast transient signal in response to a ring signal on the telephone line. The latch is coupled to an isolation transformer through a capacitor. The fast transient passes across the capacitor and through the transformer. A comparator detects the fast transient and, responsive thereto, generates a ring detect signal.
    Type: Application
    Filed: December 1, 2005
    Publication date: September 21, 2006
    Applicant: Integration Associates Inc.
    Inventors: Wayne Holcombe, Vitor Pereira, Tiago Marques
  • Patent number: 7091713
    Abstract: A method and circuit are shown for generating a higher order compensated bandgap voltage is disclosed, in which a first order compensated bandgap voltage and a linearly temperature dependent voltage are generated. Thereafter, a difference between the linearly temperature dependent voltage and the first order compensated bandgap voltage is generated. The resulting difference voltage is squared, and finally the squared voltage is added to the first order compensated bandgap voltage, resulting in a higher order compensated bandgap voltage. There is also disclosed a higher order temperature compensated bandgap circuit.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: August 15, 2006
    Assignee: Integration Associates Inc.
    Inventors: János Erdélyi, András Vince Horváth
  • Publication number: 20060146914
    Abstract: A method and apparatus for medium access control in a receiver is shown, involving frequency hopping through each of a plurality of channel frequencies for the receiver, monitoring a baseband section of the receiver using a data quality detector (DQD) circuit configured to assert a DQD signal when valid data is sensed at the output of a demodulator of the receiver, waiting a first preset period of time after changing the channel frequency for each frequency hop and monitoring whether the DQD signal is asserted, resuming frequency hopping if the DQD signal is not asserted within the first preset period of time, and maintaining a current channel frequency in order to receive a data packet if the DQD is asserted.
    Type: Application
    Filed: March 2, 2006
    Publication date: July 6, 2006
    Applicant: Integration Associates Inc.
    Inventors: Vince Horvath, Krisztian Kovacs, Miklos Lukacs, Andras Hegyi, Tibor Keller