Patents Assigned to Integration Associates, Inc.
  • Patent number: 7139391
    Abstract: A hook switch circuit is shown wherein two high-voltage bipolar transistors, a PNP transistor Q1 and a NPN transistor Q2. that are connected in a regenerative feedback manner to form a bi-stable latch. The regenerative structure permits the use of low beta transistors that may be turned on with a low control current, but still conduct a sufficient off-hook current. Also shown is a polarity steering regenerative switch (MP1, MP2) that provides a power supply voltage from a telephone line pair and may be adapted for a polarity signal and can be combined with a current mirror (MP7) to produce a current signal proportional to the line voltage (LV1).
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: November 21, 2006
    Assignee: Integration Associates, Inc.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Patent number: 7061319
    Abstract: A low-voltage supply low-power variable gain amplifier is shown that includes an input control circuit for receiving input signals, a variable gain amplifier (VGA) coupled to the input control circuit, and a circuit output terminal. A differential transconductor is interposed between the input control circuit and the VGA. The VGA amplification of the differential transconductor output is controlled by a gain control voltage signal. A differential amplifier is interposed between the input control circuit and the differential transconductor, where the differential amplifier receives and amplifies the input signal to produce an amplified input signal. An output filter is interposed between the VGA and the circuit output terminal.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: June 13, 2006
    Assignee: Integration Associates, Inc.
    Inventor: Jaime E. Kardontchik
  • Patent number: 6690244
    Abstract: A variable frequency oscillator circuit comprising a resonator circuit part and an amplifier circuit part. The resonator circuit part has a first end and a second end, and it comprises a parallel connected inductor-capacitance pair. The amplifier circuit part comprises first and second transistors having a collector, base, and emitter. The amplifier circuit part further comprises a first impedance matching element connected between the base of the second transistor and the first end of the resonator circuit part, and a second impedance matching element connected between the base of the first transistor and the second end of the resonator circuit part. The impedance matching elements are inductors, namely the third inductor and the fourth inductor. The application of the inductors provides a noise-matched optimum source impedance for the active amplifier circuit part.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: February 10, 2004
    Assignee: Integration Associates, Inc.
    Inventors: Ferenc Mernyei, Janos Erdelyi
  • Patent number: 6690078
    Abstract: A PIN photodiode and method for forming the PIN photodiode are shown where an intrinsic layer of the photodiode can be made arbitrarily thin and a second active region of the photodiode substantially shields a first active region of the photodiode. A fabrication substrate is lightly doped in order to form the intrinsic layer of the photodiode. A void is formed in a first surface of the fabrication substrate and a first active region of the photodiode having a first conductivity type is formed in the void. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A depth of the void is selected such that a portion of the first active region is exposed at the second surface of the fabrication substrate after lapping.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: February 10, 2004
    Assignee: Integration Associates, Inc.
    Inventors: Pierre R. Irissou, Brian B. North, Wayne T. Holcombe, Stephen F. Colaco
  • Patent number: 6556330
    Abstract: A method and apparatus are shown for integrating a photodiode and a receiver circuit on a single substrate. An input signal is received with the photodiode. The receiver circuit is configured to suppress feedback from an output terminal of the receiver circuit to the photodiode by amplifying the input signal to produce an amplified input signal, controlling the gain of the input signal amplification responsive to the magnitude of the amplified input signal, comparing the amplified input signal to a detection threshold voltage to produce a digital data signal, and holding the gain at a substantially constant level in response to a fast signal transition in the digital output signal.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: April 29, 2003
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6548878
    Abstract: A method is shown for producing a distributed PN photodiode having a first active region of the photodiode that can be made arbitrarily thin. A fabrication substrate is doped to have a first conductivity type in order to form the first active region of the photodiode. A layer can also be formed upon the first surface of the fabrication substrate or a first surface of a handling wafer, where the layer can be an oxide layer, where a thickness of the oxide layer can be controlled to form a dielectric refractive reflector, a reflective layer, or a conductive layer. The first surface of the handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the first active region. A plurality of second active regions of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: April 15, 2003
    Assignee: Integration Associates, Inc.
    Inventors: Jean-Luc Nauleau, Wayne T. Holcombe, Pierre Irissou
  • Patent number: 6458619
    Abstract: A method is shown for producing a PIN photodiode having low parasitic capacitance and wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A first glass layer is formed on a first surface of a handling substrate. The first surface of the handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: October 1, 2002
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 6360090
    Abstract: Disclosed is a method and apparatus for receiving infrared signals that is better able to receive a data signal in the presence of a noise signal. The method according to the present invention involves bandwidth filtering an incoming signal that includes a data signal and a noise signal. The bandwidth filtered signal is then averaged to obtain an average alternating current (AC) value signal of the bandwidth filtered signal. The average AC value signal is integrated to obtain a detect level adjustment signal. The detect level adjustment signal is summed with a minimum detect threshold value to obtain a detection level signal. The incoming signal is then compared to the detection level signal in order to produce a received data signal.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: March 19, 2002
    Assignee: Integration Associates, Inc.
    Inventors: Wayne T. Holcombe, Brian B. North
  • Patent number: 6356375
    Abstract: A method and apparatus are shown for integrating a photodiode and a receiver circuit on a single substrate. An input signal is received with the photodiode. The receiver circuit is configured to suppress feedback from an output terminal of the receiver circuit to the photodiode by amplifying the input signal to produce an amplified input signal, controlling the gain of the input signal amplification responsive to the magnitude of the amplified input signal, comparing the amplified input signal to a detection threshold voltage to produce a digital data signal, and holding the gain at a substantially constant level in response to a fast signal transition in the digital output signal.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: March 12, 2002
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6303967
    Abstract: A method is shown for producing a PIN photodiode using a reduced number of masks wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. A groove is etched from the second surface of the fabrication substrate through the intrinsic region to the first surface in order to isolate the photodiode.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: October 16, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 6240283
    Abstract: A method and apparatus is shown for controlling the input gain of a receiver wherein the input gain is controlled by sampling an amplified data signal during a time interval when a positive-going feedback transient from an output terminal of the receiver to an input terminal of the receiver is not present in the amplified data signal. An embodiment of a receiver circuit according to the present invention includes an input amplifier having variable gain determined by a gain control signal, a comparator which compares the amplified data signal from the input amplifier to a detection threshold voltage to produce a demodulated data signal and an analog delay circuit which delays the amplified data signal by a predetermined time interval to produce a delayed data signal. A switch is driven by the demodulated data signal to sample the delayed data signal for input to an automatic gain control circuit.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: May 29, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6198118
    Abstract: A distributed photodiode structure is shown having a plurality of diffusions formed in a uniform pattern on a first surface of a semiconductor substrate and interconnected by a plurality of connective traces. The diffusions are minimum geometry dots for a standard semiconductor fabrication process that are spaced apart from one another by an interval that is less than an average distance travelled by photo-generated carriers in the substrate before recombination. A conductive backplane is formed on a second surface of the semiconductor substrate to produce an inverted induced signal for noise cancelling.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: March 6, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6169765
    Abstract: An output signal pulse width error correction circuit and method wherein errors in a data signal conforming to a communications protocol having a prescribed duty cycle are corrected by monitoring a duty cycle of the data signal, comparing the duty cycle to a duty cycle reference voltage corresponding to the prescribed duty cycle, and adjusting a pulse width of the data signal to conform to the prescribed duty cycle of the protocol. An embodiment is shown that low pass filters the input data signal to introduce greater slope to the input data signal which is then compared to a pulse width control voltage in order to generate an output data signal. The pulse width control voltage is produced by integrating the output data signal to obtain an average value corresponding to the duty cycle of the output data signal and comparing the average value to a duty cycle reference voltage corresponding to the prescribed duty cycle for the communications protocol.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: January 2, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6118829
    Abstract: A method and apparatus are shown for automatically adjusting a response bandwidth and input sensitivity of a communications receiver responsive to a frequency of a received data signal. The response bandwidth is adjusted by switching a low pass filter into a receive path of the receiver when the received data signal is a low speed data signal and switching the low pass filter out of the receive path when the received data signal is a high speed data signal. The input sensitivity is adjusted by either changing a detection threshold of a comparator in the receive path or varying a gain of an input amplifier in the receive path. The high speed data signal is discerned when the low pass filter limits the response bandwidth of the receiver by a mode selection circuit which examines the duration of multiple pulses in a pulse train in the received data signal.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: September 12, 2000
    Assignee: Integration Associates, Inc.
    Inventor: Brian B. North
  • Patent number: 6081558
    Abstract: A method and circuits are shown for managing the power usage of a receiver circuit by controlling bias current in at least some of the subcircuits of the receiver using a bias current control signal which varies responsive to incoming data signal activity. A circuit is shown wherein an automatic gain control signal controls the gain in a current-mode input amplifier by reducing a bias current in the input amplifier when the activity in the incoming data signal is below an automatic gain control threshold and where the gain of the input amplifier increases responsive to a decreasing level of the bias current. A method is shown wherein the power consumption of a receiver circuit is controlled by generating a bias current control signal which corresponds to the level of activity in a received signal and controlling the bias current, in whole or in part, of at least some of the subcircuits of the receiver using the bias current control signal.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: June 27, 2000
    Assignee: Integration Associates, Inc.
    Inventor: Brian B. North
  • Patent number: 6075275
    Abstract: A method is shown for producing a PIN photodiode wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. And a second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: June 13, 2000
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 6027956
    Abstract: A method is shown for producing a PIN photodiode wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. And a second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: February 22, 2000
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 5946393
    Abstract: A data access arrangement generates a first current in a first current path which runs from a tip terminal of a line pair through a light emitting diode of an opto-isolator to a sense node. The data access arrangement also generates a second current in a second current path that runs from the tip terminal to the sense node. The first current is modulated in response to an audio input signal received from the telephone line pair, while the second current is modulated in response to a potential generated at the sense node, such that a third current flowing from the sense node to the ring terminal remains at a substantially constant predetermined magnitude.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: August 31, 1999
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 5864591
    Abstract: A receiver circuit and method wherein an automatic gain control circuit of the receiver is isolated from the input to the receiver in response to the output signal from the receiver in order to suppress the effect of feedback from the output signal to the input of the receiver.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: January 26, 1999
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe