Abstract: A log circuit for piecewise linear approximation is disclosed. The log circuit identifies an input associated with a logarithm operation to be performed using piecewise linear approximation. The log circuit then identifies a range that the input falls within from various ranges associated with piecewise linear approximation (PLA) equations for the logarithm operation, where the identified range corresponds to one of the PLA equations. The log circuit computes a result of the corresponding PLA equation based on the respective operands of the equation. The log circuit then returns an output associated with the logarithm operation, which is based at least partially on the result of the PLA equation.

Abstract: An automated auctioning system includes a customer, a web services register server (such as an Extended Markup Language (XML)-based registry server like an Universal Description, Discovery and Integration (UDDI) registry) and a number of web service providers. Automated auctioning processes of a web service desired by the customer are undertaken between the potential customer and the web service providers. The potential customer issues a bid request, and each web service provider determines whether the value of a bid in response to the bid request is below a value warranted by market demand and issues the bid if the value is higher. The potential customer assesses the bid, creating a bid assessment score. The potential customer performs an iteration on the bid assessment score using a new bid request if the score has improved since a last iteration, while engaging the web service if the score has not improved.

Abstract: An advanced zero-insertion force (ZIF) socket for coupling an electronic package having a plurality of electrical pins and a heat sink having a heat sink alignment and retention means onto a printed circuit board (PCB) of a computer system.

Abstract: A method of forming an isolation structure in a semiconductor substrate is described. A trench is first etched into a semiconductor substrate. The trench is subjected to a nitrogen-oxide gas ambient and is annealed to form a silicon-oxynitride surface along the trench sidewalls. A first oxide layer is then formed within the trench. The first oxide layer is subjected to a nitridation step and is annealed to form an oxy-nitride surface on the first oxide layer and a silicon-oxynitride interface between the first oxide layer and the semiconductor substrate. A second oxide layer is then deposited over the oxy-nitride surface of the first oxide layer. The method and isolation structure of the present invention reduce dopant outdiffusion, reduce trench stresses, allow more uniform growth of thin gate oxides, and permit the use of thinner gate oxides.