Abstract: Impeller architecture for a cooling fan and methodology for making same. The impeller architecture includes a plurality of blades, individual ones of the blades have a first end that is attached to a hub component in a sequential order, such that sequential first ends are attached to the circumference. An indexing function is applied to the sequential order, and blades or the spaces therebetween are modified accordingly to have a blade type based on their sequential location and the indexing function. The indexing function can be, in a non-limiting example, odd numbers or prime numbers.
Type:
Application
Filed:
June 6, 2023
Publication date:
December 12, 2024
Applicant:
Intel Corparation
Inventors:
Arnab Sen, Srinivasarao Konakalla, Samarth Alva, Amit Kumar, Rachit Garg, Bhavaneeswaran Anbalagan, Raghavendra S. Kanivihalli, Prasanna Pichumani
Abstract: Novel instructions, logic, methods and apparatus are disclosed to test transactional execution status. Embodiments include decoding a first instruction to start a transactional region. Responsive to the first instruction, a checkpoint for a set of architecture state registers is generated and memory accesses from a processing element in the transactional region associated with the first instruction are tracked. A second instruction to detect transactional execution of the transactional region is then decoded. An operation is executed, responsive to decoding the second instruction, to determine if an execution context of the second instruction is within the transactional region. Then responsive to the second instruction, a first flag is updated. In some embodiments, a register may optionally be updated and/or a second flag may optionally be updated responsive to the second instruction.
Type:
Grant
Filed:
June 29, 2012
Date of Patent:
February 23, 2016
Assignee:
Intel Corparation
Inventors:
Ravi Rajwar, Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon