Abstract: An apparatus to facilitate encoding video data is disclosed. The apparatus includes rendering logic to render graphics video data as frame data, fade extractor logic to extract fade effects data to be applied to the frame data to generate frame auxiliary metadata comprising the fade effects data, weighted prediction logic to receive the frame data and the auxiliary metadata and compute one or more weighted predictions on the frame data at one or more frame sequences indicated in the fade effects data and encoding logic to encode the frame data based on the one or more weighted predictions.

Abstract: A three dimensional (3D) array of magnetic random access memory (MRAM) bit-cells is described, wherein the array includes a mesh of: a first interconnect extending along a first axis; a second interconnect extending along a second axis; and a third interconnect extending along a third axis, wherein the first, second and third axes are orthogonal to one another, and wherein a bit-cell of the MRAM bit-cells includes: a magnetic junction device including a first electrode coupled to the first interconnect; a piezoelectric (PZe) layer adjacent to a second electrode, wherein the second electrode is coupled to the second interconnect; and a first layer adjacent to the PZe layer and the magnetic junction, wherein the first layer is coupled the third interconnect.

Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.

Abstract: Embodiments are directed to providing a secure address translation service.

Abstract: The present description relates the formation of a first level interlayer dielectric material layer within a non-planar transistor, which may be formed by a spin-on coating technique followed by oxidation and annealing. The first level interlayer dielectric material layer may be substantially void free and may exert a tensile strain on the source/drain regions of the non-planar transistor.

Abstract: A flexible interposer for the attachment of a microelectronic package to a microelectronic socket, wherein a first portion of the flexible substrate may be positioned between the microelectronic package and the microelectronic socket, and a second portion of the flexible interposer may extend from between the microelectronic package and the microelectronic socket to electrically contact an external component. In one embodiment, the external component may be a microelectronic substrate and the microelectronic socket may be attached to the microelectronic substrate.

Abstract: A method to provide transfer of data without the use of a network from an application program to an embedded device. A routing service establishes a communication channel without the use of a local area network. The routing service then manages the control of this communication channel for the transfer of data and closes the channel in an appropriate period.

Abstract: The present invention is a channel estimator based on the values of received data and on a priori probabilities only of received symbols. The channel estimator includes a symbol probability generator, a noise variance estimator and a channel tap estimator. The symbol probability generator generates a priori probabilities only of transmitted symbols found in the received signal(s). The noise variance estimator estimates at least one noise variance corrupting the received signal(s). The channel tap estimator generates channel estimates from the received signal(s), the a priori probabilities and the noise variance(s).