Patents Assigned to Intel IP Corporation
  • Patent number: 10714455
    Abstract: IC package assemblies including a molding compound in which an IC chip surface is recessed relative to the molding compound. Thickness of the IC chip may be reduced relative to its thickness during the molding process. Another IC chip, heat spreader, etc. may then occupy the resultant recess framed by the molding compound to achieve a fine stacking pitch. In some embodiments, a package-on-package (PoP) assembly includes a center-molded IC chip flip-chip-bonded to a first package substrate. A second substrate to which a second IC chip is flip-chip bonded is then electrically coupled to the first substrate by through-molding vias. Within the PoP assembly, the second IC chip may be disposed back-to-back with the center-molded IC chip so as to occupy the recess framed by the molding compound.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: July 14, 2020
    Assignee: Intel IP Corporation
    Inventors: Georg Seidemann, Klaus Reingruber
  • Patent number: 10713201
    Abstract: For example, an MA USB host of an MA USB PAL may be configured to process a request message from a USBDI of a USB host for a real time data transfer to be delivered between the USB host and a USB device EP; based on the request message, transmit at least one real time transfer request to an MA USB device of the MA USB PAL, a header of the real time transfer request including a request ID field to identify the real time data transfer, and a delivery time field to indicate a delivery time to complete delivery of the real time data transfer; and, based on a determination that the real time data transfer is not to be completed by the delivery time, send a response to the USBDI, the response including an error indication to indicate failure of the real time data transfer.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: July 14, 2020
    Assignee: INTEL IP CORPORATION
    Inventors: Elad Levy, Michael Glik, Rafal Wielicki, Bahareh Sadeghi, Avishai Ziv
  • Patent number: 10715995
    Abstract: Methods, apparatus, and computer-readable media are described to encode a trigger frame for a second station (STA2). A first sounding frame for the STA2 is generated. The first timestamp is associated with a transmission of the first sounding frame. A second sounding frame from the STA2 based upon the first sounding frame is decoded. The second sounding frame includes a holding time indication associated with a second timestamp and a third timestamp. A fourth timestamp is associated with receiving the second sound frame. The holding time indication is protected. A round-trip time is calculated based upon the first timestamp, the holding time indication, and the fourth timestamp.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: July 14, 2020
    Assignee: Intel IP Corporation
    Inventors: Jonathan Segev, Qinghua Li, Benny Abramovsky, Feng Jiang
  • Patent number: 10716066
    Abstract: Embodiments of a high efficiency subchannel selective transmission (HE SST) access point (AP) and an HE SST station (STA) are generally described herein. The HE SST AP may determine a temporary primary channel for an HE SST STA. The HE SST AP may communicate with the HE SST STA in a plurality of channels that includes the temporary primary channel and further includes a primary channel. The HE SST AP may determine trigger-enabled target wake time service periods (TWT SPs) for exchange of frames between the HE SST AP and the HE SST STA on the temporary primary channel. The trigger-enabled TWT SPs may be determined to not overlap with target beacon transmission times (TBTTs) at which beacon frames that include delivery traffic indication maps (DTIMs) are to be sent on the primary channel by the HE SST AP.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: July 14, 2020
    Assignee: Intel IP Corporation
    Inventors: Po-Kai Huang, Laurent Cariou, Yaron Alpert, Arik Klein, Daniel F. Bravo, Daniel Leiderman, Amir Hitron, Robert J. Stacey
  • Patent number: 10705845
    Abstract: A processor includes a core to execute an instruction for conversion between an element array and a packed bit array. The core includes logic to identify one or more bit-field lengths to be used by the packed bit array, identify a width of elements of the element array, and simultaneously for elements of the element array and for bit-fields of the packed bit array, convert between the element array and the packed bit array based upon the bit-field length and the width of elements of the element array.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Thomas Willhalm, Robert Valentine
  • Patent number: 10708091
    Abstract: A channel estimation circuit (100) includes an input interface (110). The input interface (110) is configured to receive a plurality of pilot symbols from a communication channel. Furthermore, the channel estimation circuit (100) includes processing circuitry (120). The processing circuitry (120) is configured to generate a channel autocorrelation matrix and at least one channel cross-correlation vector. The generating of the channel autocorrelation matrix and the channel cross-correlation vector can be based on predetermined statistical information on the communication channel. Additionally, the processing circuitry (120) is configured to generate a subspace mapping for a subspace transformation based on the channel autocorrelation matrix.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventor: Stefan Fechtel
  • Patent number: 10707880
    Abstract: A circuit is configured to reduce a noise component of a measured phase signal. The circuit includes an input for a phase signal of an oscillator and an error signal estimator configured to determine parity information and an estimated error amplitude in the phase signal based on the parity information. The circuit further includes a combiner configured to provide the measured phase signal with the reduced noise component based on a combination of the phase signal and the estimated error amplitude.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventors: Elan Banin, Tamar Marom, Gil Horovitz, Rotem Banin
  • Patent number: 10708746
    Abstract: Embodiments of the present disclosure include methods, devices and systems for Bluetooth low energy discovery in wireless application service platforms. One example embodiment relates to transmitting, by a first terminal including a radio, a request message for seeking service, receiving, by a peer terminal, the request message for seeking service, transmitting to the first terminal, by the peer terminal, a response frame advertising service including service provider information.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventors: Emily H. Qi, Carlos Cordeiro, Robert Hughes
  • Patent number: 10708720
    Abstract: This disclosure describes systems, methods, and devices related to enhanced location service negotiation. A device may identify a neighbor report frame received from one or more coordinated access points (APs), wherein the neighbor report frame comprises location capability support information. The device may determine a first ranging associated ID (R-AID) associated with the location capability support information. The device may determine a first location measurement with a first coordinated AP of the one or more coordinated APs and a second location measurement with a second coordinated AP of the one or more coordinated APs using the first R-AID.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventors: Laurent Cariou, Jonathan Segev
  • Patent number: 10707946
    Abstract: A method and apparatus for receive beam-forming in an analog domain. A user equipment may perform channel estimation for obtaining a set of channel responses for a plurality of antennas of the UE. The UE may determine a beamforming codeword for receive beamforming based on the set of channel responses. The UE may apply a training codeword to the received signal in analog domain. The training codeword includes phase adjustment coefficients for each antenna and a different training codeword may be applied for each channel observation. The UE may measure a metric for at least one candidate codeword based on the set of channel responses and determine the beamforming codeword based on the metric.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: July 7, 2020
    Assignee: Intel IP Corporation
    Inventors: Michael Ruder, Yeong-Sun Hwang, Zhibin Yu, Holger Neuhaus, Tom Harel, Rajarajan Balraj, Matthias Malkowski
  • Patent number: 10698079
    Abstract: Embodiments relate to systems methods and computer readable media to enable a wireless communication device are described. In one embodiment a wireless communication device is configured for phased array communications. The wireless communication device comprises radar circuitry to detect objects that scatter a transmit radiated signal from the wireless communication device. Control circuitry is used to adjust the transmit radiated power of the phased array communications based on information provided by the radar circuitry.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 30, 2020
    Assignee: Intel IP Corporation
    Inventors: Igal Kushnir, Shmuel Ravid, Raanan Sover
  • Patent number: 10699980
    Abstract: A semiconductor device and method of including peripheral devices into a package is disclosed. In one example, a peripheral device includes a passive device such as a capacitor or an inductor. Examples are shown that include a peripheral device that is substantially the same thickness as a die or a die assembly. Examples are further shown that use this configuration in a fan out process to form semiconductor devices.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: June 30, 2020
    Assignee: Intel IP Corporation
    Inventors: Lizabeth Keser, Bernd Waidhas, Thomas Ort, Thomas Wagner
  • Patent number: 10700159
    Abstract: A system and method of providing a coil in an electronic communication device in is disclosed. Multiple dielectric layers are deposited and patterned on a semiconductor substrate or insulating mold compound. The dielectric layers provide conductive contact with a contact pad on the underlying structure. Shielding for the coil, including a seed layer covered by an insulating material, is disposed in a via of a lowermost of the dielectric layers. Grounding of the shielding seed layer is through a contact pad on the substrate or a trace between the dielectric layers. A coil is fabricated over the shielding and a solder mask deposited and patterned to cover and insulate the coil. The coil is fabricated in a via of a dielectric layer immediately below the solder mask or above this dielectric layer. Electrical contact is provided by multiple copper and seed layers in the solder mask and dielectric layers.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: June 30, 2020
    Assignee: Intel IP Corporation
    Inventors: Veronica Sciriha, Georg Seidemann
  • Patent number: 10701660
    Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of Fine Timing Measurement (FTM). For example, a first wireless station may be configured to transmit an FTM request message to a second wireless station; to transmit a first Non Data Packet (NDP) to the second wireless station; to process an FTM response message from the second wireless station; and to process a second NDP from the second wireless station.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: June 30, 2020
    Assignee: INTEL IP CORPORATION
    Inventor: Yuval Amizur
  • Patent number: 10701745
    Abstract: This disclosure describes systems, methods, and apparatuses related to secure ad hoc network access. A device may identify a cryptographic key received from a second device. The device may cause to send a probe request for service information to the second device. The device may identify a probe response including an information element received in the service information from the second device. The device may cause to send a first discovery request seeking to provision the second device. The device may identify a first discovery response from the second device including a configuration method. The device may cause to form an ad hoc wireless network group based on the first discovery response. The device may cause to exchange one or more messages to provide an access for the second device to the ad hoc wireless network group based on the cryptographic key and one or more in-band attributes.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: June 30, 2020
    Assignee: Intel IP Corporation
    Inventors: Preston J. Hunt, Emily H. Qi
  • Publication number: 20200204328
    Abstract: HARQ feedback configuration techniques for broadband wireless communication networks are described. In one embodiment, for example, an apparatus may comprise a memory and logic for user equipment (UE), at least a portion of the logic implemented in circuitry coupled to the memory, the logic to identify a hybrid automatic repeat request (HARQ) bundling window associated with a received downlink (DL) scheduling command, identify one or more HARQ feedback configuration parameters based on HARQ feedback configuration information comprised in the DL scheduling command, the one or more identified HARQ feedback configuration parameters to include a physical uplink control channel (PUCCH) format for use in transmission of HARQ feedback for the HARQ feedback bundling window, the logic to generate the HARQ feedback for transmission to an evolved node B (eNB) according to the PUCCH format. Other embodiments are described and claimed.
    Type: Application
    Filed: December 24, 2015
    Publication date: June 25, 2020
    Applicant: INTEL IP CORPORATION
    Inventors: HONG HE, ALEXEI DAVYDOV, SEUNGHEE HAN, GANG XIONG, HWAN-JOON KWON
  • Patent number: 10693450
    Abstract: An apparatus is provided which comprises: a dual stack voltage driver, wherein the dual stack voltage driver comprises a first stack of transistors, and a second stack of transistors; and one or more feedback transistors each coupled to a transistor of the second stack of transistors.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 23, 2020
    Assignee: Intel IP Corporation
    Inventors: Dharmaray Nedalgi, Karthik Ns, Vani Deshpande, Leonhard Heiss
  • Patent number: 10694427
    Abstract: Embodiments of Vehicle-to-everything (V2X) communications authentication are described. In some embodiments, a user equipment (UE) configured V2X communication and configured to operate within a fifth-generation system (5GS) and/or a combined 5GS and fourth-generation system (4GS) can encode a V2X capability indication in a request message for transmission to a network entity, such as a Access and Mobility Management Function (AMF). The V2X capability indication can indicate a capability of the UE for V2X communication over a PC5 reference point, and the request message can further include an indication of a Radio Access Technology (RAT). In some embodiments, the AMF can determine whether the UE is authorized to use the V2X communications over the PC5 reference point, and whether the UE is authorized to use the RAT indicated in the request message. Accordingly, the AMF can transmit a V2X services authorization to a next generation radio access network (NG-RAN).
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: June 23, 2020
    Assignee: Intel IP Corporation
    Inventors: Changhong Shan, Meghashree Dattatri Kedalagudde
  • Patent number: 10694499
    Abstract: Computer readable media, methods, and apparatuses for location estimation using multi-user multiple-input multiple-output in a wireless local-area network are disclosed. An apparatus is disclosed comprising processing circuitry configure to: encode a fine timing measurement (FTM) initiate (FTI) frame, the FTI frame comprising M0 message uplink resource allocations for a plurality of responders to transmit M0 messages to the HE STA. The processing circuitry further configured to configure the HE STA to transmit the FTI frame to the plurality of responders, and decode M0 messages from the plurality of responders in accordance with the M0 message uplink resource allocations, where the M0 messages are to be received at the HE STA at times T2 in accordance with multi-user multiple-input multiple-output (MU-MIMO). The processing circuitry further configured to acknowledge the M0 messages to be transmitted at a time T3, and decode M1 messages comprising a corresponding time T1 and time T4.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: June 23, 2020
    Assignee: Intel IP Corporation
    Inventors: Ganesh Venkatesan, Chittabrata Ghosh
  • Patent number: 10692492
    Abstract: Techniques are disclosed for client-side analysis of audio samples to identify one or more characteristics associated with captured audio. The client-side analysis may then allow a user device, e.g., a smart phone, laptop computer, in-car infotainment system, and so on, to provide the one or more identified characteristics as configuration data to a voice recognition service at or shortly after connection with the same. In turn, the voice recognition service may load one or more recognition components, e.g., language models and/or application modules/engines, based on the received configuration data. Thus, latency may be reduced based on the voice recognition engine having “hints” that allow components to be loaded without necessarily having to process audio samples first. The reduction of latency may reduce processing time relative to other approaches to voice recognitions systems that exclusively perform server-side context recognition/classification.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: June 23, 2020
    Assignee: Intel IP Corporation
    Inventors: Piotr Rozen, Tobias Bocklet, Jakub Nowicki, Munir Georges