Patents Assigned to Interlink Electronics
  • Patent number: 5053585
    Abstract: A multipurpose keyboard incorporating an electronic pressure sensing device, a digitizer pad featuring spatial minimization of a pressure contact area capable of locating the leading and trailing edges of the pressure contact area is described. A processor coupled to the electronic pressure sensing device is programmed to sense when various regions on a simple, fully interchangeable template overlay and the underlying electronic pressure sensing device are depressed. The sensed region is associated by the processor with a particular key identification on the template overlay. The variation of the resistance in the digitizer pad enables the processor to detect the actuation of more than one key on the template overlay at the same time, thereby defecting key rollover. A method of fabrication for a multipurpose keyboard is also described.
    Type: Grant
    Filed: October 12, 1990
    Date of Patent: October 1, 1991
    Assignee: Interlink Electronics, Incorporated
    Inventor: Stuart I. Yaniger
  • Patent number: 4963702
    Abstract: A digitizer pad apparatus includes at least one digitizer ply where each digitizer ply has a first and a second resistor strip, each with a resistance gradient along its length, oriented in spaced apart relationship. A plurality of conductor traces are interconnected along the length of each resistor strip to extend toward and be interleaved between each other to define a sensor pad region. Each sensor pad region defines a dimensional direction. A shunt ply is positioned to face the sensor pad region in normally non-conducting relationship so that when a selected area is pressed into contact with the conductor traces, conduction between adjacent conductor traces via the shunt ply will occur in the selected contact area. The selected contact area has a first edge and a second edge opposite the first edge along the defined dimensional direction.
    Type: Grant
    Filed: February 9, 1989
    Date of Patent: October 16, 1990
    Assignee: Interlink Electronics, Inc.
    Inventors: Stuart I. Yaniger, James P. Rivers
  • Patent number: 4810992
    Abstract: A digitizer pad includes at least two base plys, each having thereon at least three terminals, a resistor ply disposed between two of the terminals with a plurality of conductors extending from each resistor ply which are spaced apart and interleaved with a plurality of conductors extending from each third terminal. The respective base plys' conducting surfaces face each other and are sandwiched about a nonconductive ply that includes a pressure sensitive conductive layer on each side, the area of which layer covers a portion of the area encompassed by the interleaved conductors on each base ply. The resistor plys and conductors on each base ply are at predetermined angles to those on the base ply, hence the conductors of each base ply form two predefined axes. A voltage source is sequentially coupled, by suitable switching means, across a selected pair of terminals on each ply to measure the selected location along the parameter dimension defined by the terminals across which the voltage source is coupled.
    Type: Grant
    Filed: April 19, 1988
    Date of Patent: March 7, 1989
    Assignee: Interlink Electronics, Inc.
    Inventor: Franklin N. Eventoff
  • Patent number: 4739299
    Abstract: A digitizer pad includes at least two sets of terminals where each set has at least a first and second terminal positioned to define a parameter dimension therebetween. A resistor ply is disposed between the terminals of each set. The resistor ply has an electrical contact surface with a resistance gradient profile between the terminals in each set. An output terminal is electrically interconnected to a selected location along the contact surface of the resistor ply. A voltage source is sequentially coupled, by suitable switching means, across a selected subset of terminals in each set of terminals whereby the voltage at the output terminal is a measure of the selected location along the parameter dimension defined by the terminals across which the voltage source is coupled.
    Type: Grant
    Filed: January 17, 1986
    Date of Patent: April 19, 1988
    Assignee: Interlink Electronics, Inc.
    Inventors: Franklin N. Eventoff, Tyrone Christiansen