Abstract: Methods, apparatus and computer program products for removal of elements from a linked list while other elements of the linked list are allowed to be accessed during the removal operation. In one embodiment, the method, apparatus and computer program product include identifying an add/remove area of a linked list and a static area of the linked list. Elements may only be added or removed from the linked list in the add/remove area or by a garbage collector that performs garbage collection only on elements in the static area of the linked list. The garbage collector identifies an element after the last element in the add/remove area and performs garbage collection beginning with that element and moving through the static area. In an alternative embodiment, a “next element” pointer in a previous list element is set to point to the element being deleted's “next element” pointer. Any global references to the element being deleted must be modified.

Abstract: A pinned layer structure of a spin valve sensor is formed by sputter deposition of cobalt iron (CoFe) in a nitrogen (N2) atmosphere. This method permits a wider range of deposition times of a copper spacer layer to achieve a desirable ferromagnetic coupling field (HF) between the pinned layer structure and a free layer structure in the spin valve sensor.

Abstract: To provide a technique for dynamically selecting an optimum communication route based on estimated transmission speed over different communication lines, a network system comprises the processes of measuring data transfer rates of a telephone line for transmitting data between a server and a client bidirectionally and of a satellite line for transmitting data in only one direction from the server to the client; and selecting one from the telephone line and the satellite line on the basis of the measured data transfer rates.

Abstract: Disclosed is an integrated lead suspension flexure attachment structure for a micro-actuator with a slider/transducer assembly attached thereto, having a plurality of electrical terminals for both the micro-actuator and the transducer. The suspension provides low gimbal stiffness and allows the slider to have correct pitch and roll static attitudes. An attachment platform is provided for mechanically attaching the micro-actuator. Two elongate cantilever compliance members extend from the transducer edge and the opposite edge of the attachment platform. Two lead termination platforms are provided, each at the distal end of one of the compliance members. The lead termination platforms extend laterally to either side of the compliance members. Electrical leads are positioned laterally of each of the lead termination platforms on either side, and loop towards the compliance member to the lead termination platform to reduce stiffness of the leads.

Abstract: An IEEE 754 standard floating point multiply instruction for binary extended precision format can be executed with a quad word format on an S/390 process. The multiplication calculation multiplies each partition by each other. In the multiplication calculation process dataflow process of either operand is a denormalized number, they are normalized at a stage which creates an expanded exponent range of one more bit, and the calculation continues to a parallel path multiplexor stage, but if neither operand is denormalized then the exponent of the number is expended and the calculation splits into four parallel paths, wherein two operand's sign bits are processed in a sign calculation block stage, the operands' two 16 bit binary exponents are processed by an exponent conversion block stage, and a partition multiplicand significand block stage receives a 113 bit multiplicand significand input for a fourth path.

Abstract: A socket connector system for forming a separable electrical contact between a first circuit substrate and a second circuit substrate. A dendrite interposer is disposed between the first circuit substrate and the second circuit substrate. A solder body is disposed between the first circuit substrate and the dendrite interposer. The solder body may include one of several types of solder columns or a solder ball. The solder body has a contact end which engages the dendrite interposer. The contact end has a void. An area of the contact end engages the dendrite interposer when compressive forces are exerted on the first circuit substrate and the second circuit substrate. This provides for all areas of a plurality of contact ends to engage and form reliable electrical contacts with the contact pads.

Abstract: A method of dynamically avoiding defective cache lines in a cache used by a processor of a computer system is disclosed. A repair mask is used, having an array of bit fields each corresponding to a cache lines in the cache, and certain bit fields in the repair mask array are initially set to indicate that a group of corresponding cache lines are defective. Thereafter the repair mask is updated by setting additional bit fields in the repair mask array to indicate that an additional group of corresponding cache lines are defective. Access to all defective cache lines is prevented based on the corresponding bit fields in the repair mask array. The initial setting of certain bit fields can take place at fabrication of the cache chip in response to testing of the cache lines. Additionally, the repair mask may be updated each time the computer system is booted in response to testing by the boot procedure.

Abstract: Electronic semiconductor structures, and fabrication and sparing methods, each utilize an electrically programmable spare circuit incorporated with a multichip package. The programmable sparing capability in the multichip package is accomplished either with or without the inclusion of a spare chip(s). With a spare memory circuit, individual failed memory cells in the semiconductor chips of a stack can be functionally replaced by memory cells of the spare memory circuit subsequent to encapsulation and burn-in testing. With use of a spare chip, non-volatile sparing can occur subsequent to encapsulation and burn-in testing without physical rewiring of a wire bond connection. Specific details of alternate electronic semiconductor structures, and fabrication and sparing methods therefore, are set forth.

Abstract: A dynamic reconfiguration request for a change in a system's physical configuration is transmitted from a configuration controller to a hypervisor controlling operating systems executing in one or more partitions of the system. The hypervisor translates the physical reconfiguration request into a request for reconfiguration of logical resources known to the operating systems, first verifying it against an installation policy, and passes the requests to the operating systems in the partitions. The operating systems perform logical reconfiguration, then request physical reconfiguration of the hypervisor. The hypervisor initiates the physical reconfiguration through the configuration controller.

Abstract: A reusable isolation structure features an easily cleanable shell. The opening of the shell includes a groove formed around the periphery thereof and is preferably not more than slightly smaller than an interior cross-section of the shell. A closure member (door) of the isolation structure is dimensioned to fit within the opening and has a resilient seal member clamped to the periphery of a backbone by front and rear plates. The front and rear plates cooperate with grooves formed in the backbone to define a preferred form of manifold for coupling pressure or a vacuum to the interior of the resilient seal member whereby the resilient seal member may be collapsed to allow removal of the closure member or allowed to expand or pressurized to provide secure closure member. A vacuum structure for handling the closure member simultaneously provides for evacuation and controlled collapse of the resilient seal member as well as containment of contamination of the exterior thereof.

Abstract: Method for reducing data loss during I/O errors and power failure during non-atomic writes to media in a transaction management system using write-ahead logging protocol. A recovery log is written during forward processing. On system restart processing, the log is traversed and a REDO executed. Recovery is effected from detected incomplete log writes or log write failures and uncommitted transactions are undone. A technique is provided in which files having I/O errors are identified, whereby subsequent restart operations are prevented from accessing these files. In one embodiment index files with such error are renamed, serving to indicate that corresponding original files contain errors, and the error index files are automatically rebuilt whereby I/O error on the files causes no data loss. The index file rebuild does not invalidate access plans related to the failed index.