Patents Assigned to Internatioanl Business Machines Corporation
  • Patent number: 10571520
    Abstract: A scan chain latch circuit, a method of operating a latch circuit in a scan chain, and a computer-readable medium having stored thereon a data structure defining a scan chain latch circuit for instantiation on a semiconductor die are disclosed. In an embodiment, the scan chain latch circuit comprises a first latch for holding one data value, a second latch for holding another data value, and a multiplexor. The one data value is applied to a first data input of the multiplexor and the another data value is applied to a second data input of the multiplexor. An alternating clock signal is applied to a select input of the multiplexor to control the output of the multiplexor, wherein the output of the multiplexor toggles between the two data values held in the two latches at a defined frequency.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: February 25, 2020
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Dzmitry S. Maliuk, Franco Stellari, Alan J. Weger, Peilin Song
  • Patent number: 10296527
    Abstract: A method for determining an object referenced within a set of one or more informal online communications comprises: generating a knowledge graph for a company based at least on formal online communications, the knowledge graph comprising a plurality of node elements, and the knowledge graph further comprising, for each node element of the knowledge graph, a corresponding halo comprising one or more words which are temporally proximate to that node element within the formal online communications; for each node element of the knowledge graph which is determined to be present in a given informal online communication, detecting a halo comprising one or more words which are temporally proximate to that node element within the given informal online communication; and identifying which of the plurality of node elements has a corresponding halo within the knowledge graph most similar to the detected halo, wherein the identified node element is the referenced object.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: May 21, 2019
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Stephen M. Chu, Ning Duan, Min Gong, Yun Jie Qiu, Junchi Yan
  • Patent number: 9697074
    Abstract: A method for delocalizing an error checking on a data in a pipelined processor from the data checked. A first check-data is generated at a first location on a first data. A second location receives the first data and the first check-data. A second check-data is generated on the first data and the first check-data is compared with the second check-data at the second location. A second data is generated from the first data and a third check-data is generated on the second data at the second location. A third check-data is generated on the second data at the second location and the second data is transferred to a third location. The third check-data is transferred to a fourth location. A fourth check-data is generated on the second data and is transferred to the fourth location. The fourth check-data and the third check-data are compared at the fourth location.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: July 4, 2017
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Steven R. Carlough, James R. Cuffney, Michael Klein, Silvia M. Mueller
  • Patent number: 9071516
    Abstract: A method for configuring a client-side communications protocol stack includes a mapping to be consulted to determine a set of client-side protocol stack components which correspond to a set of protocol stack components in a server side protocol stack instance. Subsequently, a listing can be created of the determined set of client-side protocol stack components. Finally, the listing can be published for access by externally disposed client computing processes. The listing can be reversed. Also, the consulting step further can include determining at least one attribute to be applied to at least one of the client-side protocol stack components when enabling a client-side protocol stack to interoperate with the server-side protocol stack instance.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: June 30, 2015
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Erik J. Burckart, Stephen M. Fontes, Craig A. Lanzen
  • Publication number: 20130007469
    Abstract: Provided are a computer readable storage medium, computer apparatus, and method for securely managing the execution of screen rendering instructions in a host operating system and virtual machine. A first rendering instruction hooking section is set to a first mode to hook a screen rendering instruction issued by a virtual machine application in a virtual machine. A second rendering instruction hooking section is set to a second mode to hook instructions issued by the virtual machine application. The hooked screen rendering instruction issued by the virtual machine application are encrypted in response to the setting of the first mode to produce illegible output. The hooked screen rendering instruction issued by the virtual machine application are encrypted in response to the setting of the second mode. The encrypted hooked screen rendering instruction encrypted in the second mode are issued to a host operating system to decrypt.
    Type: Application
    Filed: June 4, 2012
    Publication date: January 3, 2013
    Applicant: INTERNATIOANL BUSINESS MACHINES CORPORATION
    Inventors: Taku Aratsu, Sanehiro Furuichi, Masami Tada
  • Publication number: 20130001801
    Abstract: Interconnect structures are provided including at least one patterned dielectric layer located on a substrate, wherein said at least one patterned dielectric layer includes differently sized conductive features embedded therein. The differently sized conductive features are laterally adjacent to each other and are located at a same interconnect level.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: Internatioanl Business Machines Corporation
    Inventor: Qinghuang Lin
  • Patent number: 8021974
    Abstract: An improved semiconductor structure consists of interconnects in an upper interconnect level connected to interconnects in a lower interconnect level through use of a conductive protrusion located at the bottom of a via opening in an upper interconnect level, the conductive protrusion extends upward from bottom of the via opening and into the via opening. The improved interconnect structure with the conductive protrusion between the upper and lower interconnects enhances overall interconnect reliability.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: September 20, 2011
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Chih-Chao Yang, David Vaclav Horak, Takeshi Nogami, Shom Ponoth
  • Patent number: 7449374
    Abstract: Integrated circuits are oriented on a substrate at an angle that is rotated between 5 to 40 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mobility of transistors may be optimized by adjusting the angle of rotation of the substrate. For a rotated substrate CMOS device design, other stress control measures may be used, such as a stress control or tensile liner, over an NMOS transistor, PMOS transistor, or both, to further adjust the stress and improve performance.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: November 11, 2008
    Assignees: Infineon Technologies AG, Internatioanl Business Machines Corporation
    Inventors: Matthias Hierlemann, Chun-Yung Sung, Brian J. Greene, Manfred Eller
  • Patent number: 7440986
    Abstract: A storage requirements estimating system estimates the storage required for a proposed multidimensional clustering data by modeling wasted space. The amount of wasted space is modeled by calculating the cardinality of the unique value of the clustering key for the proposed configuration. Cardinality may be determined by estimation techniques. Specific values for wasted space and total space may be determined in response to the determined cardinality. Comparison of estimates for different proposed clustering configurations facilitate a selection among proposed multidimensional clustering data configurations.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: October 21, 2008
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Sam Sampson Lightstone, Sriram K. Padmanabhan, Richard E. Swagerman
  • Patent number: 7379348
    Abstract: A system and method of selective row energization based on write data, with a selective row energization system including a storage array 102 having M rows 104 and N columns 106; an N-bit data word register 108; a uniform-detect circuit 110 responsive to a data word to generate a uniform word data bit having a first value when the data word is uniform; an M-bit uniform-detect register 112 having M uniform-detect latches 114, each being associated with one of the M rows 104 and storing the uniform word data bit for the data word stored in the associated M row 104; and an M-bit row driver device 116 responsive to the uniform word data bit for each of the M rows 104 to inhibit energization of the M rows 104 for which the uniform word data bit is the first value.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: May 27, 2008
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Michael J. Lee, Jose A. Paredes, Peter J. Klim, Sam G. Chu
  • Patent number: 7335927
    Abstract: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: February 26, 2008
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Douglas Duane Coolbaugh, Jeffrey Bowman Johnson, Xuefeng Liu, Bradley Alan Orner, Robert Mark Rassel, David Charles Sheridan
  • Patent number: 7320938
    Abstract: A method for reducing dendrite formation in a self-aligned, silicide process for a semiconductor device includes forming a silicide metal layer over a semiconductor substrate, the semiconductor device having one or more diffusion regions, one or more isolation areas and one or more gate structures formed thereon. The concentration of metal rich portions of the metal layer is reduced through the introduction of silicon thereto, and the semiconductor device is annealed.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: January 22, 2008
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Robert J. Purtell, Yun-Yu Wang, Keith Kwong Hon Wong
  • Patent number: 7191371
    Abstract: A testing circuit for testing a series of at least three alternating transmitter and receiver links. The testing circuit including a built-in-self-test (BIST.) macro for generating test data and transmitting the test data to a first link of the series of transmitter and receiver links, and for receiving processed test data from a last link of the series of transmitter receiver links; and at least one test transmission line for transmitting test data received by a link of the series of transmitter and receiver links to a next link of the series of transmitter and receiver links, wherein the at least one test transmission line connects the at least three transmitter and receiver links.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: March 13, 2007
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Louis L. Hsu, Li-Kong Wang
  • Patent number: 6908025
    Abstract: A process and apparatus for preparing an MCM for hat removal where the hat includes a piston thermally coupled to a corresponding chip. The apparatus includes a heater positioned to reflow a joint between the piston and a base of the hat; and a retractor for biasing the piston away from the corresponding chip. Implementation of the apparatus and process prevent a piston, as it moves across the top of a corresponding chip during mechanical shear to remove the hat, to impact chip(s) and surrounding components. In addition, since piston(s) are retracted, the likelihood of piston impact with or cracking of a chip is reduced. In addition, cutting into a corresponding chip having a tilted back surface is prevented. The need to replace chips and other electronic components when making other repairs may, therefore, be greatly reduced.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: June 21, 2005
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Patrick A. Coico, Steven P. Ostrander, Sudipta K. Ray
  • Publication number: 20030004822
    Abstract: A method for integrating multi-channel retailing can include distributing and replicating selected data across retail channels via asynchronously transmitted messages in a common data format. The method can include the steps of: intercepting data processing messages in a retail IT system for use in one type of retail channel; formatting data in the intercepted messages using a user-definable markup language; and, asynchronously communicating the formatted data to at least one other retail IT system for use in at least one other type of retail channel. Notably, the user definable markup language can be XML. In one aspect of the invention, each converted data processing message can be asynchronously forwarded to a data control point; and, the forwarded messages can be asynchronously routed in the data control point to the others of the retail IT systems.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Applicant: Internatioanl Business Machines Corporation
    Inventors: David U. Shorter, Filip J. Yeskel
  • Patent number: 6118155
    Abstract: Apparatus for use in ESD circuitry are provided that comprise a substrate layer on a dielectric wherein the substrate layer includes a first geometric region comprising alternating regions of first and second conductivity types, a second geometric region of substantially one conductivity type surrounding the first geometric region and a third geometric region of substantially one conductivity type surrounding the second geometric region. The substrate layer further includes at least one dielectric layer on at least the second geometric region and a gate layer on the dielectric layer, over the second geometric region and over at least a portion of the second geometric region that is adjacent the alternating first and second conductivity type regions. In a first aspect of the invention, the alternating first and second conductivity type regions preferably are abutted, and a salicide layer may be employed to coupled together adjacent first and second conductivity type regions if desired.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: September 12, 2000
    Assignee: Internatioanl Business Machines Corporation
    Inventor: Steven H. Voldman
  • Patent number: 5986761
    Abstract: A laser-based inspection tool (LIT) for disks that allows simultaneous inspection of disk surfaces for defects and curvature. The laser beam is directed by a rotating scanner, such as a rotating polygon mirror, to the input of a telecentric lens assembly that provides an output beam parallel to its optical axis as the beam is being scanned. The output beam from the telecentric lens strikes the disk surface substantially perpendicularly. The beam is then reflected from the disk surface and passes back through a collection lens to the sensing surface of an optical detector. The detector outputs analog signals that represent the X and Y positions on the sensing surface where the reflected light beam is incident, which thus correspond to the slope of the disk surface at the point where the laser beam was incident. A mechanical disk lifter moves the disk in a plane parallel to the disk surface so that different scan lines can be generated on the disk surface.
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: November 16, 1999
    Assignee: Internatioanl Business Machines Corporation
    Inventors: Linden Crawforth, Wayne Isami Imaino, Anthony Juliana, Jr., Milton Russell Latta, Hal Jervis Rosen