Abstract: Device, system and method of verification of address translation mechanisms. For example, an apparatus for testing an address translation mechanism of a design-under-test, the apparatus including: a test generator to receive a specification of at least one address translation table, and to generate one or more constraint-satisfaction-problem projectors over a plurality of attributes of said address translation table.

Abstract: A Phase Change Memory (PCM) cell structure comprises both a lower electrode composed of a PCM layer and a conductive encapsulating upper electrode layer. The PCM layer is protected from damage by the conductive encapsulating layer. Electrical isolation between adjacent PCM cells is provided by high electrical resistance regions which were formed by modifying the conductivity of both the PCM layer and the conductive encapsulating upper electrode layer subsequent to deposition thereof.

Abstract: Sizes of buffer pools for temporarily storing data from a database are dynamically optimized. A database server includes: a dividing ratio setting unit for setting a dividing ratio for dividing a memory area of a predetermined size into a plurality of buffer pools used selectively according to a type of transaction or type of data; a response time measuring unit for measuring response time of transactions; a response time computation formula generating unit for calculating parameters of a response time calculation formula for calculating the response time based on the size of each of the plurality of buffer pools from the set dividing ratio and the measured response time; and a dividing ratio calculation unit for calculating the dividing ratio that minimizes the response time by using the response time calculation formula; wherein the dividing ratio setting unit sets the dividing ratio calculated by the dividing ratio calculating unit.

Abstract: System, method and program for installing a first operating system, including a first hardware abstraction layer and other operating system functions, into a client computer. An image of the other operating system functions and a second hardware abstraction layer is loaded into the client computer. The second hardware abstraction layer is functionally interrelated with the second hardware abstraction layer in the image. There is automatic detection that the second hardware abstraction layer loaded into the client computer is incompatible with the client computer. In response, the second hardware abstraction layer with the first hardware abstraction layer is automatically replaced in the client computer. Subsequently, the first operating system including the first hardware abstraction layer and the other operating systems functions is booted up in the client computer.

Abstract: A system and method for detecting a drone implanted by a vandal in a network connected host device such as a computer, and controlling the output of the drone. The system includes an inbound intrusion detection system (IDS), an outbound IDS, a blocker such as a firewall, an inbound trace log for storing a trace of inbound traffic to the protected device, an outbound trace log for storing a trace of outbound traffic from the protected device, and a correlator. When the outbound IDS detects outbound distributed denial of service (DDoS) traffic, the outbound IDS instructs the blocker to block the outbound DDos traffic. The correlator then recalls the outbound trace log and the inbound trace log, correlates the logs, and deduces the source ID of a message responsible for triggering the drone. The correlator then instructs the blocker to block incoming messages that bear the source ID.