Patents Assigned to International Business and Machines Corporation
  • Patent number: 6683466
    Abstract: A test module having a lid to force a chip in contact with the test pads using a bed of nails to conform to the shape of the chip. The lengths of the nails are cut to conform to be of equal length above the chip with different size heads to apply the proper force. A pressurized bag may be placed above the head of nails to apply force to the chip.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventor: John Richard Behun
  • Patent number: 6683335
    Abstract: In a gate array having adjacent lines of PFETs and NFETs along a first axis, some gates of PFETs and/or NFETs extend into the region between wells and along a first (x) axis of the lines of transistors to overlap along the axis, so that an extended gate of an nth transistor, a gate of an (n−1)th non-extended transistor and a gate of an (n−1)th non-extended transistor of the opposite polarity lie along an axis (y) perpendicular to the first axis. In a rectangular layout, the upper right transistor (having an extended gate) is connected to the lower left transistor by a short connection along the y axis.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Naohisa Hatani, Manabu Ohkubo
  • Patent number: 6684369
    Abstract: A software tool is provided for use with a computer system for simplifying the creation of Web sites. The tool comprises a plurality of pre-stored templates, comprising HTML formatting code, text, fields and formulas. The templates preferably correspond to different types of Web pages and other features commonly found on or available to Web sites. Each feature may have various options. To create a web site, a Web site creator (the person using the tool to create a web site) is prompted by the tool through a series of views stored in the tool to select the features and options desired for the Web site. Based on these selections, the tool prompts the web site creator to supply data to populate fields of the templates determined by the tool to correspond to the selected features and options. Based on the identified templates and supplied data, the tool generates the customized Web site without the web site creator writing any HTML or other programming code.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: January 27, 2004
    Assignee: International Business Machines, Corporation
    Inventors: Richard S. Bernardo, David A. MacPhee
  • Patent number: 6684225
    Abstract: A database management system having a dropped table recovery flag. If the dropped table recovery flag is on at the time that a table is dropped, an entry will be made in a dropped table history file. The dropped table history file contains a timestamp of the time of table drop, a unique dropped table identifier, and table definition information. The system includes a command to permit the table-space of a dropped table to be restored and rolled forward to the point of the dropped table drop. The restored and rolled forward dropped table data is written to a flat file. The flat file data is loaded into a recreated table in the current table space to recover the dropped table.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Matthew Albert Huras, Dale M. McInnis, Effi Ofer, Michael J. Winer, Roger Luo Q. Zheng
  • Patent number: 6684205
    Abstract: A method and structure of searching a database containing hypertext documents comprising searching the database using a query to produce a set of hypertext documents; and geometrically clustering the set of hypertext documents into various clusters using a toric k-means similarity measure such that documents within each cluster are similar to each other, wherein the clustering has a linear-time complexity in producing the set of hypertext documents, wherein the similarity measure comprises a weighted sum of maximized individual components of the set of hypertext documents, and wherein the clustering is based upon words contained in each hypertext document, out-links from each hypertext document, and in-links to each hypertext document.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Dharmendra Shantilal Modha, William Scott Spangler
  • Patent number: 6684243
    Abstract: A method, system or program product for assigning a dual address to a workstation connecting anywhere to an IP data transmission network composed of at least a first Local Area Network (LAN) provided with a home Dynamic Host Configuration Protocol (DHCP) server, a home Domain Name Services (DNS) server and a home registration server; this method comprising: a) off-line registering into the registration server the workstation parameters including a static IP address, and a logon ID and password which have been provided to the user of the workstation, b) connecting the workstation to the IP network, the workstation being configured in DHCP mode, c) providing by the home registration server a dynamic IP address to the workstation, d) calling the home registration server by the workstation to get first the static IP address and, secondly a configuration file for the workstation, and e) configuring automatically the applications to be processed by the workstation with the static IP address or the dynamic IP ad
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Guy Euget, Jean-Francois Le Pennec
  • Patent number: 6683854
    Abstract: A system for checking the integrity of data transfer in a switching element in a high speed packet switching network node where multicasting is performed by simultaneously shifting data from a first shift register into the targeted device shift registers. The outputs of the device registers are fed back into the first shift register. The checking system includes a device select circuit for selecting the targeted via a set of select lines and a negative OR gate circuit. The select line signals and the first register output are inputs to the OR gate, the output of which is fed back to the first register. A comparator circuit has inputs supplied by the device select lines and the outputs of the device registers. A processor compares the contents of the first register to the outputs from the logic comparator circuit to test whether the data has been properly multicast to the targeted.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Alain Blanc, Patrick Jeanniot, Alain Pinzaglia
  • Patent number: 6684341
    Abstract: A method, apparatus, and computer implemented instructions in a data processing system for managing processor power usage. Current processor utilization is compared to current processor spaced to form a comparison. Current processor speed is decreased in response to current processor speed being greater then the current processor utilization. Current processor speed is increased in response to processor speed being less than the current processor utilization in the comparison. In this manner processor speed is adjusted to meet the processor utilization. In addition, power management may be based on particular programs executing on the data processing system. A program is identified in the data processing system to form an identified program. This identified program may be one that is being initialized for execution or currently executing. Power usage is set based on the identified program. User input may be used to select particular programs for power management.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jerry Walter Malcolm, Allen Chester Wynn
  • Patent number: 6683967
    Abstract: An image processing apparatus comprises: a binarization unit 12 for obtaining a binary image for the image entered by an image input unit 10; a connected component detector 14 for detecting the obtained connected components; a comparator 16 for comparing the size of the detected connected components with a predetermined threshold size; a mesh image forming unit 18 for dividing the image entered by the image input unit 10 into mesh images having a predetermined size; a corresponding mesh image detector 19 for detecting, from the mesh images, a mesh image that corresponds to a connected component that is determined by the comparator 16 to occupy a range within the threshold size; a specific area extraction unit 22 for extracting a specific area in accordance with the connection state of the corresponding mesh image that is detected; and an image recognition unit 23 for recognizing an image that is located in the extracted specific area.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventor: Hiroyasu Takahashi
  • Patent number: 6682860
    Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
  • Patent number: 6683624
    Abstract: A method and apparatus for depicting programming state of programming objects through a combination of associating semantic stat space with programming objects, updating semantic state through affiliated state updates with each programming action, and resolving the alternative programming states with a convergence operator defined on the semantic state space of the programming object type. The state reflection process is further defined in cases where the visual programming object participates in multiple execution paths, as would be the case in, for example, an IF statement wherein the variable is used on both the Left and Right sides. More particularly, this technique resolves these differing states back into a single state representation for the programming object.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Donald P. Pazel, Marcel R. Karam
  • Patent number: 6684186
    Abstract: In an illustrative embodiment, a speaker model is generated for each of a number of speakers from which speech samples have been obtained. Each speaker model contains a collection of distributions of audio feature data derived from the speech sample of the associated speaker. A hierarchical speaker model tree is created by merging similar speaker models on a layer by layer basis. Each time two or more speaker models are merged, a corresponding parent speaker model is created in the next higher layer of the tree. The tree is useful in applications such as speaker verification and speaker identification.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Homayoon S. M. Beigi, Stephane H. Maes, Jeffrey S. Sorensen
  • Patent number: 6684362
    Abstract: Methods and apparatus are provided for connecting a manufacturing test interface to a global serial bus, such as an inter integrated circuit (I2C) bus. Input/output buffer logic buffers data to be transferred to and from the global serial bus. A slave interface logic connected to the input/output buffer logic receives and sends data to the input/output buffer logic. A slave controller coupled to the input/output buffer logic and the slave interface logic paces data exchange to the input/output buffer logic. Error detection logic is coupled between the input/output buffer and the global serial bus for detecting error conditions.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Guy Richard Currier, James Scott Harveland, Sharon Denos Vincent, Paul Leonard Wiltgen
  • Patent number: 6684380
    Abstract: A technique for simplifying a structure so that subsequent electrical analysis can be more efficiently performed. The technique includes facility to modify the existing shapes in the structure so that they do not overlap, to determine the allowed movement of each edge of each shape in the structure, to apply a set of factors to each movement that determines how advantageous the movement is with respect to the number of unknowns and the change in geometry and/or electrical parameters of the structure, and to choose and then make the movement associated with the highest factor. The factors are unity based so that the desirability of the move is given by the product of all the factors. The technique includes facility to iterate, calculating the factors and making the movement associated with the greatest factor, until the factor falls below a given threshold. The resulting structure will be similar in electrical characteristics to the original structure, yet require fewer unknowns to analyze.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Barry J Rubin, Erik J Breiland
  • Patent number: 6682992
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Publication number: 20040012046
    Abstract: A capacitor structure having a re-oxide layer on a nitride layer, wherein an interface between the nitride layer and the re-oxide layer includes electron traps. Characteristics of the carrier traps control a voltage output of the device. The thickness of the nitride layer and the re- oxide layer also control the voltage output. The nitride layer and a re-oxide layer form a dielectric capacitor. The dielectric capacitor undergoes a trap filled limit voltage, wherein a consistent voltage is output for a plurality of currents.
    Type: Application
    Filed: July 22, 2002
    Publication date: January 22, 2004
    Applicant: International Business Machines Corporation
    Inventors: Fen Chen, Rajarao Jammy, Baozhen Li, Sebastian T. Ventrone
  • Publication number: 20040015920
    Abstract: An object oriented mechanism and method allow allocating Java objects on a method's invocation stack in a dynamic compilation environment under certain conditions. When a class is dynamically compiled by a just-in-time (JIT) compiler (as the program runs), one or more of its methods may create objects that may be placed on the method's invocation stack. During the compilation of the class, only the information relating to the previously-loaded classes is taken into account. After compilation, as each new class is loaded, the class is analyzed to see if loading the class might change the analysis used to allocate objects on the invocation stacks of previously-compiled methods. If so, the previous object allocations are analyzed in light of the object reference(s) in the newly loaded class, and the previous object allocations are changed from the invocation stack to the heap, if required.
    Type: Application
    Filed: March 20, 2001
    Publication date: January 22, 2004
    Applicant: International Business Machine Corporation
    Inventor: William Jon Schmidt
  • Publication number: 20040015956
    Abstract: The present invention is embodied in a system and method for managing software packages that are to be installed on a computer. Basically, the present invention automatically de-installs previously installed software based on user defined preferences to prevent trial, demo or unwanted software and its components from being unnecessarily kept on the user's computer. In general, the present invention includes a de-install module that is associated with the process of installing software on the computer. The de-install module includes a time module that allows the user to choose the time period to keep the software package on the computer before the software is uninstalled. The de-install module can be initiated at the start-up of the computer and then go into a temporary hidden mode that stills stays resident. In other words, during this mode, the de-install module is active, but hidden from the user and only activated when a software package initiates installation on the computer.
    Type: Application
    Filed: April 5, 2001
    Publication date: January 22, 2004
    Applicant: International Business Machines Corporation
    Inventors: Janel G. Barfield, Matthews S. Cronk, Kevin L. Fought, Johnny M. Shieh
  • Publication number: 20040014474
    Abstract: A system and method for wireless network connection switching management is shown. The system notifies a mobile user that his portable terminal is within an area where it can be provided with local fast wireless communication service such as a hot-spot service versus using a low speed, but wide coverage wireless access network. Radio waves for communication transmitted by a mobile wireless terminal are received at a WWAN receiving system provided in a WLAN system. The radio waves are capable of communicating with a WWAN (Wireless Wide Area Network) system utilizing a third generation mobile phone network and a WLAN (Wireless Local Area Network) system providing a hot-spot service. Instructions are output to the terminal via the Internet and a base station of the WWAN system that the mobile terminal is within an AP service area of an access point of the WLAN system. The user may choose to switch wireless network access networks in order to achieve faster access to the Internet.
    Type: Application
    Filed: June 13, 2003
    Publication date: January 22, 2004
    Applicant: International Business Machines Corporation
    Inventor: Yoshihisa Kanada
  • Publication number: 20040012075
    Abstract: A method of forming a relaxed SiGe-on-insulator substrate having enhanced relaxation, significantly lower defect density and improved surface quality is provided. The method includes forming a SiGe alloy layer on a surface of a first single crystal Si layer. The first single crystal Si layer has an interface with an underlying barrier layer that is resistant to Ge diffusion. Next, ions that are capable of forming defects that allow mechanical decoupling at or near said interface are implanted into the structure and thereafter the structure including the implanted ions is subjected to a heating step which permits interdiffusion of Ge throughout the first single crystal Si layer and the SiGe layer to form a substantially relaxed, single crystal and homogeneous SiGe layer atop the barrier layer. SiGe-on-insulator substrates having the improved properties as well as heterostructures containing the same are also provided.
    Type: Application
    Filed: July 16, 2002
    Publication date: January 22, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Keith E. Fogel, Devendra K. Sadana