Abstract: A method, apparatus, and computer program product are described for controlling data transfer. A next data packet to be transferred is retrieved. A determination is made regarding whether a data bus busy signal is asserted. If the data bus busy signal is asserted, a determination is made regarding whether a data bus grant signal is asserted. If the data bus grant signal is asserted, the next data packet is transferred on the next cycle after a last cycle of data transfer of a previous data packet.
Type:
Grant
Filed:
November 8, 1999
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Robert Earl Kruse, Robert Allen Drehmel
Abstract: A low voltage level shifter circuit with an embedded latch, implemented on a signal line having thereon low voltage signals. There is included a low voltage level shifter circuit configured to receive a low voltage input signal from a first portion of the signal line and output a higher voltage output signal on a second portion of the signal line. A latching circuit is also included, and is configured to latch the low voltage input signal from the first portion of the signal line.
Type:
Grant
Filed:
April 2, 2002
Date of Patent:
January 27, 2004
Assignees:
Infineon Technologies Ag, International Business Machines Corporation
Inventors:
David Hanson, Gerhard Mueller, Toshiaki Kirihata
Abstract: A system, method and program extender for enforcing the uniqueness of temporal data in an object/relational database management system is provided. There is a combination of user-defined functions, triggers and specified conditions to determine if attempts to insert new data or update existing data in a data object in which temporal integrity is a consideration are valid. Barriers exist to protect against inserts or updates that would violate the temporal integrity of the existing data. Also included are ways for a user to modify the behavior of the system or method to override triggers for cases in which temporal integrity is not desired.
Type:
Grant
Filed:
June 20, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: A method and system for conducting a search on a network is disclosed. The network has a plurality of sites. One or more of the sites has a plurality of documents wherein at least one of the documents comprises a plurality of tags. The method and system comprises identifying at least one of the plurality of tags, receiving a query, parsing the query, and matching the parsed query with at least one of the plurality of tags of the at least one of the plurality of documents. Accordingly, through the use of a method and system in accordance with the present invention, the extraction of information from networks comprising XML documents is done in a more precise fashion.
Type:
Grant
Filed:
June 19, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: A method, system, and program for controlling advertising output during hold periods are provided. A context for a call on hold is detected. An advertisement is selected for output during a hold space a hold period of the call according to the context. Output of the advertisement during the hold space is controlled, wherein the advertisement is specified according to the context. The advertisement may include text messages, audio messages, video messages, for advertising a product or service or making an announcement.
Type:
Grant
Filed:
December 17, 2001
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Michael Wayne Brown, Joseph Herbert McIntyre, Michael A. Paolini, James Mark Weaver, Scott Lee Winters
Abstract: A test module having a lid to force a chip in contact with the test pads using a bed of nails to conform to the shape of the chip. The lengths of the nails are cut to conform to be of equal length above the chip with different size heads to apply the proper force. A pressurized bag may be placed above the head of nails to apply force to the chip.
Type:
Grant
Filed:
May 17, 2002
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: In a gate array having adjacent lines of PFETs and NFETs along a first axis, some gates of PFETs and/or NFETs extend into the region between wells and along a first (x) axis of the lines of transistors to overlap along the axis, so that an extended gate of an nth transistor, a gate of an (n−1)th non-extended transistor and a gate of an (n−1)th non-extended transistor of the opposite polarity lie along an axis (y) perpendicular to the first axis. In a rectangular layout, the upper right transistor (having an extended gate) is connected to the lower left transistor by a short connection along the y axis.
Type:
Grant
Filed:
June 22, 2001
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: A software tool is provided for use with a computer system for simplifying the creation of Web sites. The tool comprises a plurality of pre-stored templates, comprising HTML formatting code, text, fields and formulas. The templates preferably correspond to different types of Web pages and other features commonly found on or available to Web sites. Each feature may have various options. To create a web site, a Web site creator (the person using the tool to create a web site) is prompted by the tool through a series of views stored in the tool to select the features and options desired for the Web site. Based on these selections, the tool prompts the web site creator to supply data to populate fields of the templates determined by the tool to correspond to the selected features and options. Based on the identified templates and supplied data, the tool generates the customized Web site without the web site creator writing any HTML or other programming code.
Type:
Grant
Filed:
June 19, 1998
Date of Patent:
January 27, 2004
Assignee:
International Business Machines, Corporation
Abstract: A database management system having a dropped table recovery flag. If the dropped table recovery flag is on at the time that a table is dropped, an entry will be made in a dropped table history file. The dropped table history file contains a timestamp of the time of table drop, a unique dropped table identifier, and table definition information. The system includes a command to permit the table-space of a dropped table to be restored and rolled forward to the point of the dropped table drop. The restored and rolled forward dropped table data is written to a flat file. The flat file data is loaded into a recreated table in the current table space to recover the dropped table.
Type:
Grant
Filed:
July 27, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Matthew Albert Huras, Dale M. McInnis, Effi Ofer, Michael J. Winer, Roger Luo Q. Zheng
Abstract: A method and structure of searching a database containing hypertext documents comprising searching the database using a query to produce a set of hypertext documents; and geometrically clustering the set of hypertext documents into various clusters using a toric k-means similarity measure such that documents within each cluster are similar to each other, wherein the clustering has a linear-time complexity in producing the set of hypertext documents, wherein the similarity measure comprises a weighted sum of maximized individual components of the set of hypertext documents, and wherein the clustering is based upon words contained in each hypertext document, out-links from each hypertext document, and in-links to each hypertext document.
Type:
Grant
Filed:
October 18, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Dharmendra Shantilal Modha, William Scott Spangler
Abstract: A method, system or program product for assigning a dual address to a workstation connecting anywhere to an IP data transmission network composed of at least a first Local Area Network (LAN) provided with a home Dynamic Host Configuration Protocol (DHCP) server, a home Domain Name Services (DNS) server and a home registration server; this method comprising:
a) off-line registering into the registration server the workstation parameters including a static IP address, and a logon ID and password which have been provided to the user of the workstation,
b) connecting the workstation to the IP network, the workstation being configured in DHCP mode, c) providing by the home registration server a dynamic IP address to the workstation,
d) calling the home registration server by the workstation to get first the static IP address and, secondly a configuration file for the workstation, and
e) configuring automatically the applications to be processed by the workstation with the static IP address or the dynamic IP ad
Type:
Grant
Filed:
May 23, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: A system for checking the integrity of data transfer in a switching element in a high speed packet switching network node where multicasting is performed by simultaneously shifting data from a first shift register into the targeted device shift registers. The outputs of the device registers are fed back into the first shift register. The checking system includes a device select circuit for selecting the targeted via a set of select lines and a negative OR gate circuit. The select line signals and the first register output are inputs to the OR gate, the output of which is fed back to the first register. A comparator circuit has inputs supplied by the device select lines and the outputs of the device registers. A processor compares the contents of the first register to the outputs from the logic comparator circuit to test whether the data has been properly multicast to the targeted.
Type:
Grant
Filed:
March 18, 1999
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Alain Blanc, Patrick Jeanniot, Alain Pinzaglia
Abstract: A method, apparatus, and computer implemented instructions in a data processing system for managing processor power usage. Current processor utilization is compared to current processor spaced to form a comparison. Current processor speed is decreased in response to current processor speed being greater then the current processor utilization. Current processor speed is increased in response to processor speed being less than the current processor utilization in the comparison. In this manner processor speed is adjusted to meet the processor utilization. In addition, power management may be based on particular programs executing on the data processing system. A program is identified in the data processing system to form an identified program. This identified program may be one that is being initialized for execution or currently executing. Power usage is set based on the identified program. User input may be used to select particular programs for power management.
Type:
Grant
Filed:
March 9, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Jerry Walter Malcolm, Allen Chester Wynn
Abstract: An image processing apparatus comprises: a binarization unit 12 for obtaining a binary image for the image entered by an image input unit 10; a connected component detector 14 for detecting the obtained connected components; a comparator 16 for comparing the size of the detected connected components with a predetermined threshold size; a mesh image forming unit 18 for dividing the image entered by the image input unit 10 into mesh images having a predetermined size; a corresponding mesh image detector 19 for detecting, from the mesh images, a mesh image that corresponds to a connected component that is determined by the comparator 16 to occupy a range within the threshold size; a specific area extraction unit 22 for extracting a specific area in accordance with the connection state of the corresponding mesh image that is detected; and an image recognition unit 23 for recognizing an image that is located in the extracted specific area.
Type:
Grant
Filed:
August 14, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.
Type:
Grant
Filed:
April 12, 2002
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
Abstract: A method and apparatus for depicting programming state of programming objects through a combination of associating semantic stat space with programming objects, updating semantic state through affiliated state updates with each programming action, and resolving the alternative programming states with a convergence operator defined on the semantic state space of the programming object type. The state reflection process is further defined in cases where the visual programming object participates in multiple execution paths, as would be the case in, for example, an IF statement wherein the variable is used on both the Left and Right sides. More particularly, this technique resolves these differing states back into a single state representation for the programming object.
Type:
Grant
Filed:
August 17, 2000
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: In an illustrative embodiment, a speaker model is generated for each of a number of speakers from which speech samples have been obtained. Each speaker model contains a collection of distributions of audio feature data derived from the speech sample of the associated speaker. A hierarchical speaker model tree is created by merging similar speaker models on a layer by layer basis. Each time two or more speaker models are merged, a corresponding parent speaker model is created in the next higher layer of the tree. The tree is useful in applications such as speaker verification and speaker identification.
Type:
Grant
Filed:
January 26, 1999
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Homayoon S. M. Beigi, Stephane H. Maes, Jeffrey S. Sorensen
Abstract: Methods and apparatus are provided for connecting a manufacturing test interface to a global serial bus, such as an inter integrated circuit (I2C) bus. Input/output buffer logic buffers data to be transferred to and from the global serial bus. A slave interface logic connected to the input/output buffer logic receives and sends data to the input/output buffer logic. A slave controller coupled to the input/output buffer logic and the slave interface logic paces data exchange to the input/output buffer logic. Error detection logic is coupled between the input/output buffer and the global serial bus for detecting error conditions.
Type:
Grant
Filed:
February 18, 1999
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Guy Richard Currier, James Scott Harveland, Sharon Denos Vincent, Paul Leonard Wiltgen
Abstract: A technique for simplifying a structure so that subsequent electrical analysis can be more efficiently performed. The technique includes facility to modify the existing shapes in the structure so that they do not overlap, to determine the allowed movement of each edge of each shape in the structure, to apply a set of factors to each movement that determines how advantageous the movement is with respect to the number of unknowns and the change in geometry and/or electrical parameters of the structure, and to choose and then make the movement associated with the highest factor. The factors are unity based so that the desirability of the move is given by the product of all the factors. The technique includes facility to iterate, calculating the factors and making the movement associated with the greatest factor, until the factor falls below a given threshold. The resulting structure will be similar in electrical characteristics to the original structure, yet require fewer unknowns to analyze.
Type:
Grant
Filed:
April 1, 2002
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
Type:
Grant
Filed:
May 15, 2002
Date of Patent:
January 27, 2004
Assignee:
International Business Machines Corporation
Inventors:
Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning