Abstract: Methods, structure and design structure having isolated back gates for fully depleted semiconductor-on-insulator (FDSOI) devices are presented. In one embodiment, a method may include providing a FDSOI substrate having a SOI layer over a buried insulator over a first polarity-type substrate, the first polarity-type substrate including a second polarity-type well therein of opposite polarity than the first polarity; forming a trench structure in the FDSOI substrate; forming an active region to each side of the trench structure in the SOI layer; and forming a PFET on the active region on one side of the trench structure and an NFET on the active region on the other side of the trench structure.

Abstract: Methods, systems and computer program products for architecting fault tolerant applications. Embodiments of the invention include a method for executing an application in a computer system, the method including monitoring a behavior of the computer system, the computer system having a subsystem in an operating system of the computer system, in response to encountering a problem in the computer system, performing switching the application from a normal mode of operation to a critical mode of operation, executing the application in the critical mode of operation, determining if the computer system has returned to the normal mode of operation, in response to the computer system returning to the normal mode of operation switching the application to execute in the normal mode and executing the application in the normal mode of operation.

Abstract: A method, system, and computer usable program product for selective memory donation in a virtual real memory environment are provided in the illustrative embodiments. A virtual machine receives a request for memory donation. A component of the virtual machine determines whether a portion of a memory space being used for file caching exceeds a threshold. The determining forms a threshold determination, and the portion of the memory space being used for file caching forms a file cache. If the threshold determination is false, the component ignores the request. If the threshold determination is true, a component of the virtual machine releases a part of the file cache that exceeds the threshold. The part of the file cache forms a released file cache. In response to the request, the virtual machine makes the released file cache available to a requester of the request.

Abstract: A system, method and computer program product for optimizing a software system through scenario evaluation. In accordance with the disclosed technique, a request is received for evaluation of an operational scenario that operates over an environment that is a superset of existing system capabilities encompassing system features or parameters that are not available in the currently running system. A knowledge base is consulted to derive recommendations with respect to operating parameters that may be collected to evaluate the scenario, mechanisms for gathering data relating to the parameters, and data evaluator operations for deriving a data evaluation result based on the data gathering. The knowledge base is further consulted to determine a reconfiguration recommendation based on the result. Scenario evaluation is performed based on simulation of the reconfiguration recommendation using the data evaluation result to determine efficacy of the scenario.

Abstract: An interface is provided between a virtual cluster proxy and a virtual I/O server on a logical partitioned platform. The virtual I/O server is configured to support virtual real memory. A command is received from a virtual cluster proxy. The virtual cluster proxy identifies whether the command is a virtual real memory command or a virtualization command. Virtual real memory commands and virtualization commands are marked by the virtual cluster proxy with a virtualization marker. The virtualization marker indicates that the command is a virtual real memory command or a virtualization command. The command is then forwarded to a logical partitioned platform. A virtual memory manager intercepts the command and identifies whether the command has been marked with the virtualization marker. If the command is marked with the virtualization marker, the virtual memory manager reroutes the command to the virtual I/O server.

Abstract: Techniques for protein structure analysis are provided. In one aspect, an apparatus for characterizing a multi-domain protein structure comprises the following steps. For at least one domain, a hydrophobic dipole, e.g., defined as a first-order hydrophobic moment of the domain, is calculated. A score representing the orientation of the hydrophobic dipole of the at least one domain relative to a hydrophobic dipole of one or more other domains of the multi-domain protein structure is then calculated.

Abstract: An exemplary embodiment of the invention relates to a method for facilitating supply chain collaboration in a network environment, said supply chain including an enterprise and at least one supplier. The method includes generating and transmitting an unconstrained forecast to a supplier; receiving a supplier capability statement in response; and generating a constrained forecast utilizing the supplier capability statement. The constrained forecast is transmitted to the supplier which responds with a formal commitment to product a needed supply indicated in the constrained forecast. The method also includes monitoring inventory levels at a replenishment service center by a supplier based upon a formal commitment, refilling inventory items at the replenishment service center, and facilitating delivery of the inventory items to the enterprise site by transmitting a pull signal to the replenishment service center whereby inventory items are delivered in response to the pull signal.

Abstract: Transparent hypervisor pinning of critical memory areas is provided for a shared memory partition data processing system. The transparent hypervisor pinning includes receiving at a hypervisor a hypervisor call initiated by a logical partition to register a logical memory area of the logical partition with the hypervisor. Responsive to this hypervisor call, the hypervisor transparently determines whether the logical memory is a critical memory area for access by the hypervisor. If the logical memory area is a critical memory area, then the hypervisor automatically pins the logical memory area to physical memory of the shared memory partition data processing system, thereby ensuring that the memory area will not be paged-out from physical memory to external storage, and thus ensuring availability of the logic memory area to the hypervisor.

Abstract: A targeted advertising method and system tracks user interaction with and responses to a displayed advertisement. The advertisement is displayed in the user viewing control interface of a media device system (e.g. delivering cable television, satellite television, global computer network/online media). Based on recorded user responses, the invention system generates viewer lists enabling targeted advertising. The viewer lists include lists of users that have viewed the advertisement, lists of users that have requested more information and/or lists of peer recommended users.

Abstract: A lateral p-i-n photodetector is provided that includes an array of vertical semiconductor nanowires of a first conductivity type that are grown over a semiconductor substrate also of the first conductivity type. Each vertically grown semiconductor nanowires of the first conductivity type is surrounded by a thick epitaxial intrinsic semiconductor film. The gap between the now formed vertically grown semiconductor nanowires-intrinsic semiconductor film columns (comprised of the semiconductor nanowire core surrounded by intrinsic semiconductor film) is then filled by forming an epitaxial semiconductor material of a second conductivity type which is different from the first conductivity type. In a preferred embodiment, the vertically grown semiconductor nanowires of the first conductivity type are n+ silicon nanowires, the intrinsic epitaxial semiconductor layer is comprised of intrinsic epitaxial silicon, and the epitaxial semiconductor material of the second conductivity type is comprised of p+ silicon.

Abstract: A heatsink structure and method for the cooling of closely spaced packaged heat-producing devices, such as dual-in-line memory modules (DIMMs). A folded sheet metal heatsink structure is provided which is constituted of a coined metallic material and which has a large plurality of waffle-shaped ridges extending therefrom constituting additional surface areas which are adapted to enable heat generated by hub chips to pass upwardly and then outwardly through waffle-like ridges and, thus, dissipated to the exterior, thereby imparting an improved degree of cooling to heat-producing components or devices.

Abstract: A requester-side autonomic governor is provided for a requester configured to send service requests to a service provider. For example, the requester and service provider may be disposed in a Service Oriented Architecture (SOA) architected system. A feedback loop, preferably a monitor portion of a Monitor, Analyze, Plan, and Execute (MAPE) loop, is configured to monitor responses to service requests. An autonomic governor mechanism limits the type and/or number of concurrent service requests according to a resource pool scheme, and dynamically adjusts a resource threshold of the resource pool scheme based on information provided by the feedback loop. In one embodiment, the resource threshold is reduced if more than a predetermined number of service requests generated time-outs, and is increased if more than a predetermined number of service requests are being held awaiting available pool resources and less than a predetermined number of service requests generated time-outs.

Abstract: A system and incorporated method is provided for performing high reliability flash updates using firmware residing in a computing environment. The system comprises a nonvolatile memory having a boot sector and an application sector and a volatile memory in processing communication to update the nonvolatile memory. The volatile memory also includes an implemented algorithm that can temporarily store functions necessary to update the nonvolatile memory via a flash update.

Abstract: Migration management is provided for a shared memory logical partition migrating from a source system to a target system. The management approach includes managing migration of the logical partition from the source system to the target system by: transferring a portion of logical partition state information for the migrating logical partition from the source system to the target system by copying at the source system contents of a logical page of the migrating logical partition into a state record buffer for forwarding to the target system; forwarding the state record buffer to the target system; and determining whether the migrating logical partition is suspended at the source system, and if not, copying at the target system contents of the state record buffer to paging storage of the target system, the paging storage being external to physical memory managed by a hypervisor of the target system.

Abstract: Improved fin field effect transistor (FinFET) devices and methods for the fabrication thereof are provided. In one aspect, a method for fabricating a field effect transistor device comprises the following steps. A substrate is provided having a silicon layer thereon. A fin lithography hardmask is patterned on the silicon layer. A dummy gate structure is placed over a central portion of the fin lithography hardmask. A filler layer is deposited around the dummy gate structure. The dummy gate structure is removed to reveal a trench in the filler layer, centered over the central portion of the fin lithography hardmask, that distinguishes a fin region of the device from source and drain regions of the device. The fin lithography hardmask in the fin region is used to etch a plurality of fins in the silicon layer. The trench is filled with a gate material to form a gate stack over the fins.

Abstract: A method, system, and computer usable program product for migrating memory data between partitions are provided in the illustrative embodiments. All or a portion of a memory data of the source partition is written to a data storage unit, which may be a shared paging space, or a shared area of a data storage unit other than a paging space. The writing uses a first data communication path configured for paging the memory data. The portion of the memory data from the data storage unit is read at a destination partition. The reading uses a second data communication path configured for paging a second memory data. The read portion of the memory data may be used for executing a migrated application. The writing and reading may use a third and a fourth data communication paths respectively that may be configured for paging memory data to the shared area.

Abstract: A method, system, computer program product, and computer program storage device for transforming a high-level policy associated with a high layer to a low-level policy associated with a low layer. Mapping between high-level objects in a high layer and low-level objects in a low layer is derived by an automated discovery tool. The high-level policy is mapped to the low-level policy according to the mapping (e.g., by substituting the high-level objects with the low-level objects and by performing a syntax transformation). In one embodiment, a low-level policy is transformed to a high-level policy according to the mapping. As exemplary embodiments, policy transformations in traffic shaping and data retention are disclosed.

Abstract: The present invention provides a semiconducting device structure including a thin SOI region, wherein the SOI device is formed with an optional single thin diffusion, i.e., offset, spacer and a single diffusion implant. The device silicon thickness is thin enough to permit the diffusion implants to abut the buried insulator but thick enough to form a contacting silicide. Stress layer liner films are used both over nFET and pFET device regions to enhance performance.

Abstract: An illustrative embodiment provides a computer implemented method for managing package dependencies for an application installation. The computer implemented method identifies a set of used files for the application and a package for a respective file in the set of used files to form identified packages, adding names of the identified packages to an original package list of package names for the application, wherein the original package list defines package dependencies, and determines whether the identified packages can be located.

Abstract: A method and system in accordance with the present invention provides an intelligent prediction approach for populating and depopulating multiple applications at the system level across applications. The detection and management of user behavior patterns to anticipate the user's next request is provided. Further the present invention is to account for a situation to relate dynamically to user behavior and where that user behavior changes to adjust so as to more accurately set forth a desired result for a user of the present invention. The present invention in various implementations provides an intelligent prediction scheme for populating and depopulating multiple applications at the system level across a diversity of applications.