Abstract: A hybrid string constructor includes a database configured to store a set of known concretizations. A processor is configured to compare the one or more string components to the set of known concretizations to determine string components from input string information that may be represented concretely, to abstract all string components that could not be represented concretely, and to create a hybrid string representation that includes at least one concrete string component and at least one abstracted string component. The set of known concretizations includes string configurations that cannot be interfered with by an attacker.

Abstract: Execution of a set of instructions within a transaction is prevented. A processor identifies a first set of instructions in an instruction stream of a transaction. The first set of instructions incurs a first memory access that is not visible to the transaction and will cause the transaction to abort. The processor generates a second set of instructions that incurs a second memory access that is visible to the transaction. The second set of instructions is generated based on the first memory access and first set of instructions. The processor executes, within the transaction, the second set of instructions instead of the first set of instructions.

Abstract: A method for managing a plurality of messages associated with an online messaging system is provided. The method may include receiving a message from a messaging source. The method may also include determining whether the messaging source associated with the received message is trusted. The method may further include tagging the received message or storing the received message, wherein the tagging and the storing is based on the determination that the messaging source is not trusted. The method may additionally include validating the received message.

Abstract: A method and associated security apparatus for providing security to an automatic teller machine (ATM) having a cash capture device in a presenter area of the ATM. The cash capture device is detected by a proximity detector in the security apparatus in the ATM. A detecting signal is generated by the proximity detector in response to the cash capture device being detected. The detecting signal is received by control circuitry in the security apparatus and in response, the control circuitry causes a dispensing shutter of the ATM to remain in an open position. Each proximity detector is electrically connected to the control circuitry. The dispensing shutter in the open position is configured, in an absence of the cash capture device in the ATM, to dispense paper currency processed and stored in the presenter area. Presenter belts in the presenter area transport the paper currency to a dispenser aperture.

Abstract: A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes dispensing a thermal interface material (TIM) on an electronic assembly. The method further includes removing volatile species of the TIM, prior to lid placement on the electronic assembly. The method further includes placing the lid on the TIM, over the electronic assembly. The method further includes pressing the lid onto the electronic assembly.

Abstract: A method for fabricating a semiconductor circuit includes obtaining a semiconductor structure having a gate stack of material layers including a high-k dielectric layer; oxidizing in a lateral manner the high-k dielectric layer, such that oxygen content of the high-k dielectric layer is increased first at the sidewalls of the high-k dielectric layer; and completing fabrication of a n-type field effect transistor from the gate stack after laterally oxidizing the high-k dielectric layer of the gate stack.

Abstract: The present invention provides an electrical connecting structure between a substrate 21 and a semiconductor chip 22. The electrical connecting structure comprises a metal bump 26 formed on a contact pad 28 of a semiconductor chip 22 and a coating layer 25 formed on the metal bump 26 of the semiconductor chip 22. The coating layer includes material not wettable with solder. The electrical connecting structure further comprises a metal pad 24 formed on the substrate 21. The electrical connecting structure further comprises a solder 29 connecting to a side surface of the metal bump 26 and an outer surface of the metal pad 24. The outer surface is not covered by the coating layer 25.

Abstract: Various embodiments disclose a method for fabricating a semiconductor structure including a plurality of vertical transistors each having different threshold voltages. In one embodiment the method includes forming a structure having at least a substrate, a source contact layer on the substrate, a first spacer layer on the source contact layer, a replacement gate on the first spacer layer, a second spacer layer on the replacement gate, and an insulating layer on the second spacer layer. A first trench is formed in a first region of the structure. A first channel layer having a first doping concentration is epitaxially grown in the first trench. A second trench is formed in a second region of the structure. A second channel layer having a second doping concentration is epitaxially grown in the second trench. The second doping concentration is different from the first doping concentration.

Abstract: An anti-fuse is provided above a semiconductor material. The anti-fuse includes a first end region including a first metal structure; a second end region including a second metal structure; and a middle region located between the first end region and the second end region. In accordance with the present application, the middle region of the anti-fuse includes at least a portion of the second metal structure that is located in a gap positioned between a bottom III-V compound semiconductor material and a top III-V compound semiconductor material. A high-k dielectric material liner separates the second metal structure from a portion of the first metal structure.

Abstract: Asymmetries are detected in one or more images by partitioning each image to create a set of patches. Salient patches are identified, and an independent displacement for each patch is identified. The techniques used to identify the salient patches and the displacement for each patch are combined in a function to generate a score for each patch. The scores can be used to identify possible asymmetries.

Abstract: A semiconductor device comprises a first semiconductor fin arranged on a substrate, the first semiconductor fin having a first channel region, and a second semiconductor fin arranged on the substrate, the second semiconductor fin having a second channel region. A first gate stack is arranged on the first channel region. The first gate stack comprises a first metal layer arranged on the first channel region, a work function metal layer arranged on the first metal layer, and a work function metal arranged on the work function metal layer. A second gate stack is arranged on the second channel region, the second gate stack comprising a work function metal arranged on the second channel region.

Abstract: Various embodiments provide computer program products for migrating data. One embodiment comprises receiving, from a first processor, data that is unprotected comprising a data integrity field; utilizing, by a second processor, a peer-to-peer remote copy (PPRC) application to add protection to the data to generate protected data; and subsequent to adding the protection, modifying a value in the data integrity field such that the value is different than an industry standard default value for protected data subsequent to adding the protection.

Abstract: A circuit apparatuses include at least one circuit feature formed from patterning a conductive sheet. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions of the circuit apparatus and is maintained in second regions of the circuit apparatus. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.

Abstract: A technique for processing instructions includes examining instructions in an instruction stream of a processor to determine properties of the instructions. The properties indicate whether the instructions may belong in an instruction sequence subject to decode-time instruction optimization (DTIO). Whether the properties of multiple ones of the instructions are compatible for inclusion within an instruction sequence of a same group is determined. The instructions with compatible ones of the properties are grouped into a first instruction group. The instructions of the first instruction group are decoded subsequent to formation of the first instruction group. Whether the first instruction group actually includes a DTIO sequence is verified based on the decoding. Based on the verifying, DTIO is performed on the instructions of the first instruction group or is not performed on the instructions of the first instruction group.

Abstract: Technical solutions are described to arbitrarily order and access email messages based on text analysis and social network analysis. One general aspect includes a system that includes an email server and an email client. The email server generates a topic map of email messages stored on the email server. The email server also generates a social map of users with accounts on the email server. The email server receives an email message from a first user, the email message directed to a second user. The email server sends the email message to a third user in response to determining that the email message is relevant to the third user. The present document further describes examples of other aspects such as methods, computer products.

Abstract: A method of performing a data write on a storage device comprises instructing a device driver for the device to perform a write to the storage device, registering the device driver as a transaction participant with a transaction co-ordinator, executing a flashcopy of the storage device, performing the write on the storage device, and performing a two-phase commit between device driver and transaction co-ordinator. Preferably, the method comprises receiving an instruction to perform a rollback, and reversing the data write according to the flashcopy. In a further refinement, a method of scheduling a flashcopy of a storage device comprises receiving an instruction to perform a flashcopy, ascertaining the current transaction in relation to the device, registering the device driver for the device as a transaction participant in the current transaction with a transaction co-ordinator, receiving a transaction complete indication from the co-ordinator, and executing the flashcopy for the device.

Abstract: A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine performs a host read and a cache destage simultaneously from storage write cache substantially without firmware involvement for greatly enhancing performance.

Abstract: In a method for managing modifications to elements of a website, receiving one or more modifications to an element of a first webpage, wherein the first webpage is a member of a website. The method further includes determining one or more webpages that include one or more instances of the modified element of the first webpage, wherein the determined one or more webpages are members of the website. The method further includes mapping a location for each of the one or more instances of the modified element within a respective webpage of the determined one or more webpages. The method further includes rendering at least a portion of the determined one or more webpages, wherein the rendered portion of the determined one or more webpages includes the location of the corresponding instance of the modified element.

Abstract: A system and method for merging changed elements in a software development environment is provided, in which the software development environment is provided with a set of at least one defect, comprising at least one changed element, associated with a software project that comprises a plurality of elements, the software project comprising a plurality of elements. The environment first obtains a list of changed elements in a defect record, for example from a defect database, and for each changed element in the list, attempts an automated merge of the changed element with a corresponding target. If any attempt fails, the environment may re-attempt the merge for any failed attempt, and may invoke a user interface for resolving the merge manually.

Abstract: A vortex-producing fan controller uses a variable-speed vortex-producing fan positioned above a server rack to create a helical airflow within the server rack that couples with cooled air entering a data center through a floor opening situated near a bottom of the server rack. A speed of the variable-speed vortex-producing fan and a flow rate of the cooled air coupled within the helical airflow up through the server rack are adjusted responsive to changes in input air temperature of air entering the variable-speed vortex-producing fan detected using a fan input air temperature sensor positioned above the server rack.