Abstract: Receive a request to write a unit of data, having a first half of bits and a second half of bits, to an index of a ternary content addressable memory (TCAM). Generate a first error-correcting code (ECC) codeword for first bits of the first half of bits of the unit of data and first bits of the second half of bits of the unit of data. Generate a second error-correcting code (ECC) codeword for second bits of the first half of bits of the unit of data and second bits of the second half of bits of the unit of data. Store the first half of bits of the unit of data in the first row of the index. Store the second half of bits of the unit of data in the second row of the index.

Abstract: A degree of social network separation of a social network user that generated expressive content of a social media posting is identified relative to a specified social network user for each of a group of social media postings. Social media postings with an equivalent identified degree of social network separation relative to the specified social network user are grouped. Differences between the expressive content of the grouped social media postings at different degrees of social network separation are determined. The determined differences between the expressive content of the grouped social media postings at the different degrees of social network separation are rendered.

Abstract: Embodiments relate to tracking cache lines. An aspect of embodiments includes performing an operation by a processor. Another aspect of embodiments includes fetching a cache line based on the operation. Yet another aspect of embodiments includes storing in an instruction address register file at least one of (i) an operation identifier identifying the operation and (ii) a memory location identifier identifying a level of memory from which the cache line is populated.

Abstract: Embodiments of the present invention provide an approach for an image provider to specify data (e.g., commands to run, files to read), etc., about an image of a virtual resource (e.g., virtual machine, etc.) in a networked computing environment (e.g., a cloud computing environment). Such data may be used (e.g., at runtime) by a client application to obtain specific information about a running instance that is provisioned based on the image (e.g., operating system health, middleware health, etc.).

Abstract: An optoelectronic packaging assembly having an optical interposer and a method of same. The assembly includes a photonic and/or optoelectronic device; a planar optical interposer coupled to the photonic and/or optoelectronic device on a first side of the optical interposer and including an optical transmission element on a second side opposite to the first side; a deflecting element; and at least one optical waveguide on the first side, in-plane with the optical interposer. The waveguide is coupled at one end to the photonic and/or optoelectronic device and at another end to the deflecting element. The deflecting element is configured to enable optical transmission between the waveguide and the optical transmission element through the optical interposer. The optical interposer includes a material allowing for optical transmission between the deflecting element and the optical transmission element.

Abstract: A method of making a silicon-on-insulator (SOI) semiconductor device includes etching an undercut isolation trench into an SOI substrate, the SOI substrate comprising a bottom substrate, a buried oxide (BOX) layer formed on the bottom substrate, and a top SOI layer formed on the BOX layer, wherein the undercut isolation trench extends through the top SOI layer and the BOX layer and into the bottom substrate such that a portion of the undercut isolation trench is located in the bottom substrate underneath the BOX layer. The undercut isolation trench is filled with an undercut fill comprising an insulating material to form an undercut isolation region. A field effect transistor (FET) device is formed on the top SOI layer adjacent to the undercut isolation region, wherein the undercut isolation region extends underneath a source/drain region of the FET.

Abstract: Test structures and method for detecting defects using the same. A probe-able voltage contrast (VC) comb test structure that includes first, second and third probe pads, a comb-like structure including grounded tines, floating tines between the grounded tines, switching devices coupled with an end portion of each floating tine, and connecting the floating tines to the second probe pad, and the third probe pad being a control pad which controls the switching devices. A probe-able VC serpentine test structure that includes first, second, third and fourth probe pads, a comb-like structure including grounded tines, floating tines between the grounded tines and each floating tine connected together between the second and third probe pads, switching devices connected to an end portion of each floating tine and connecting the floating tines to the second and third probe pads, and the fourth probe pad being a control pad which controls the switching devices.

Abstract: Embodiments of the present invention relate to a method and system for performing a memory copy. In one embodiment of the present invention, there is provided a method for performing memory copy, including: decoding a memory copy instruction into at least one microcode in response to receipt of the memory copy instruction, transforming the at least one microcode into a ReadWrite Command for each of the at least one microcode, and notifying a memory controller to execute the ReadWrite Command, wherein the ReadWrite Command is executed by the memory controller and comprises at least a physical source address, a physical destination address and a ReadWrite length that are associated with the ReadWrite Command. In another embodiment of the present invention, there is provided a system for performing a memory copy.

Abstract: An automated technique for constructing and updating protection scope is described. Preferably, the protection scope is MAC-address based. According to this technique, one or more packet processing units (PPUs) execute a MAC address learning algorithm to gather a list of MAC addresses. Packet processing units typically are one of: a kernel module residing on the hypervisor, a virtual appliance running a packet processing engine, and a software agent running on a virtual machine and that processes packet flows between and among associated virtual machines. Each of the one or more PPUs is provisioned to collect a set of MAC addresses; the PPUs exchange their lists, and the lists are then merged into a merged list from which a current protection scope is then generated. Each entry in the protection scope preferably contains information indicating which PPU is available to protect the MAC address associated with that entry.

Abstract: Apparatuses and methods to write new data of a first block size are provided. A particular method may include writing old data from a destination block of a second block size of a data drive to a first buffer of the second block size. The old data may be written according to address information of the old data and without overwriting the new data in the first buffer. The method may further include writing zeros to a second buffer of the second block size according to the address information of the old data. The zeros written in the second buffer may correspond with the old data written in the first buffer.

Abstract: Methods for detecting one or more signals at a PCI Express interface includes receiving, a signal by a receiver at the PCI Express interface. The methods further include identifying one or more data sampling points to set an amplitude threshold. Further, the method includes comparing an amplitude of the received signal with the amplitude threshold. The method also includes confirming that the received signal is a valid signal when the amplitude of the signal is at least one of greater than or equal to the amplitude threshold over a predefined period of time. The method also includes disabling a signal detector of the PCI Express interface to save power. The signal detector is configured to detect one or more low frequency signals; and testing whether the detected signal is correct.

Abstract: For a high availability cache, a cache module obtains permission to manage the cache in response to a failover event in a server cluster by communicating a cache coherency token. An update module rebuilds a cache directory from data stored in the cache and accesses the cache without reloading the data stored in the cache.

Abstract: A semiconductor device fabrication process includes forming a plurality of fins upon a semiconductor substrate and forming a plurality of gate stacks upon the semiconductor substrate orthogonal to the plurality of fins, forming fin portions by recessing the plurality of fins and semiconductor substrate adjacent to the plurality of gate stacks, and forming uniform unmerged epitaxy upon the fin portions. A semiconductor device includes the plurality of fins, the plurality of gate stacks, a first semiconductor substrate recess between a first gate stack pair and a second semiconductor recess between a second gate stack pair, and unmerged epitaxy. The plurality of fins each include fin portions and the unmerged epitaxy including a first epitaxy pair contacting fin portions associated with the first gate stack pair and a second epitaxy pair contacting fin portions associated with the second gate stack pair.

Abstract: A calculation, prediction and validation method can include receiving a portion of a data packet in a data buffer, computing, in a processor, information related to the checksum of the data packet based on the portion of the data packet and processing the data packet in the processor.

Abstract: Energy efficient control of cooling system cooling of an electronic system is provided based, in part, on weighted cooling effectiveness of the components. The control includes automatically determining speed control settings for multiple adjustable cooling components of the cooling system. The automatically determining is based, at least in part, on weighted cooling effectiveness of the components of the cooling system, and the determining operates to limit power consumption of at least the cooling system, while ensuring that a target temperature associated with at least one of the cooling system or the electronic system is within a desired range by provisioning, based on the weighted cooling effectiveness, a desired target temperature change among the multiple adjustable cooling components of the cooling system. The provisioning includes provisioning applied power to the multiple adjustable cooling components via, at least in part, the determined control settings.

Abstract: Embodiments of the invention relate to efficiently storing encrypted data in persistent storage or passing to another data processing component. A downstream decrypter is utilized to act within the data path between a data generator and a storage server. The decrypter fetches an encryption key and any other necessary auxiliary information necessary to decrypt received data. Following decryption of the data, the decrypter has the ability to operate directly on plaintext and perform storage efficiency functions on the decrypted data. The decrypter re-encrypts the data prior to the data leaving the decrypter for persistent storage to maintain the security of the encrypted data.

Abstract: A technique that supports improved debugging of kernel loadable modules (KLMs) that involves allocating a first portion of a memory and detecting a first kernel loadable module (KLM) requesting an allocation of at least a portion of the memory. The first KLM is then loaded into the first portion of the memory and a first identifier is associated with the first KLM and the first portion. The access of a second portion of the memory by the first KLM, the second portion being distinct from the first portion is detected and an indication that the first KLM has accessed the second portion is generated.

Abstract: Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer.

Abstract: Receive a request to write a unit of data, having a first half of bits and a second half of bits, to an index of a ternary content addressable memory (TCAM). Generate a first error-correcting code (ECC) codeword for first bits of the first half of bits of the unit of data and first bits of the second half of bits of the unit of data. Generate a second error-correcting code (ECC) codeword for second bits of the first half of bits of the unit of data and second bits of the second half of bits of the unit of data. Store the first half of bits of the unit of data in the first row of the index. Store the second half of bits of the unit of data in the second row of the index.

Abstract: Aspects of the invention provide for an architecture and method for testing high frequency phase shifter arrays. In one embodiment, an architecture for testing a phase shifter array, includes: a plurality of power dividers, each power divider configured to receive an output from a phase shifter within the phase shifter array and split the output into a first signal and a second signal; a plurality of power clippers, each power clipper configured to receive the second signal and modify the second signal by limiting an amplitude of the second signal; a first power combiner configured to receive the first signal from each of the plurality of power dividers to generate a first output; and a second power combiner configured to receive the modified second signal from each of the plurality of power clippers to generate a second output.