Abstract: A mechanism is provided for routing a computing task to a computing resource for executing the computing task. A dispatcher receives a timestamp at which execution of the computing task can start on the computing resource and a duration that the execution would take. The computing resource is associated with a power consumption profile. The dispatcher estimates a power efficiency factor as a function of the power consumption profile, the timestamp and the duration thereby forming an estimated power efficiency factor. The dispatcher determines whether the computing resource can execute the computing task as a function of the estimated power efficiency factor. The dispatcher then sends the computing task to the computing resource in responsive to determining that the computing resource can execute the computing task.

Abstract: A double-sided integrated circuit chips, methods of fabricating the double-sided integrated circuit chips and design structures for double-sided integrated circuit chips. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.

Abstract: A plurality of upgraded components associated with an upgraded storage subsystem replaces a plurality of existing components associated with an existing storage subsystem. Support for a verify I/O command is created. A target volume is created in the upgraded storage subsystem having a same volume identification as a source volume. For a command received on the at least one of the plurality of upgraded components, the verify I/O command is invoked on at least one of a comparable one of the plurality of existing components. If the command is verified, the command is driven. The at least one of the plurality of upgraded components disguises a true volume identification of the target volume from the at least one of the plurality of existing components.

Abstract: A biodegradable block copolymer is disclosed, comprising a hydrophilic block derived from a polyether alcohol; and a hydrophobic block comprising a first repeat unit derived by ring opening polymerization of a first cyclic carbonyl monomer initiated by the polyether alcohol, the first repeat unit comprising a side chain moiety comprising a functional group selected from the group consisting of i) urea groups and ii) mixtures of urea groups and carboxylic acid groups. No side chain of the hydrophobic block comprises a covalently bound biologically active material. The block copolymer self-assembles in water forming micelles suitable for sequestering a biologically active material by a non-covalent interaction, and the block copolymer is 60% biodegraded within 180 days in accordance with ASTM D6400.

Abstract: A computer implemented method for response tracking is described. The method includes obtaining one or more responses to one or more promotions, attributing the one or more responses to one or more treatment instances, with the one or more treatment instances correspond to a promotion version assigned to a group of contact entities at an execution of a computer implemented marketing campaign, and generating a response table, the response table including one or more entries, the entries in the response table being in accordance with attribution of the one or more responses to one or more treatment instances.

Abstract: A method for replicating I/O performance in data replication environments, such as PPRC environments, is described. In selected embodiments, such a method includes monitoring I/O workload at a primary storage device over a period of time, such as a period of hours, days, or months. The method then generates learning data at the primary storage device describing the I/O workload over the selected time period. The learning data is replicated from the primary storage device to a secondary storage device. The method uses the learning data to optimize the secondary storage device to handle the I/O workload of the primary storage device. This will enable the secondary storage device to provide substantially the same I/O performance as the primary storage device in the event a failover occurs. A corresponding system and computer program product are also disclosed and claimed herein.

Abstract: A method for randomizing data to mitigate false VFO detection is described. In one embodiment, such a method includes simultaneously receiving multiple input data streams. Each input data stream is associated with a different track on a magnetic tape medium. The input data streams are simultaneously scrambled to produce multiple randomized data streams. The input data streams are scrambled such that different bit patterns are produced in the randomized data streams even where corresponding bit patterns in the input data streams are identical. The randomized data streams are simultaneously written to their associated data tracks on the magnetic tape medium.

Abstract: A method is provided for assigning weights to configuration items (CIs) in a configurable managed system, wherein respective weights are derived from information contained in an associated configuration management database. The information could include without limitation the relationships that a configuration item (CI) has with other CIs and the number of reads and writes that are made between the CI and other CIs. A Change Manager in the configurable system makes changes affecting CIs, wherein different types of changes require different levels of confidence in the integrity of data in the CMDB. Accordingly, the weights of respective CIs are used to provide a confidence level regarding the accuracy of CMDB data, pertinent to a proposed change. The confidence level is then used by the Change Manager in deciding whether or not to make the change.

Abstract: Voltage programmable anti-fuse structures and methods are provided that include at least one conductive material island atop a dielectric surface that is located between two adjacent conductive features. In one embodiment, the anti-fuse structure includes a dielectric material having at least two adjacent conductive features embedded therein. At least one conductive material island is located on an upper surface of the dielectric material that is located between the at least two adjacent conductive features. A dielectric capping layer is located on exposed surfaces of the dielectric material, the at least one conductive material island and the at least two adjacent conductive features. When the anti-fuse structure is in a programmed state, a dielectric breakdown path is present in the dielectric material that is located beneath the at least one conductive material island which conducts electrical current to electrically couple the two adjacent conductive features.

Abstract: Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric layer from plasma damage during the plasma strip process. Reduction or elimination of a plasma damaged region in this manner also enables reduction of the line bias between a line pattern in a photoresist and a metal line formed therefrom, and changes in the line width of the line trench due to a wet clean after the reactive ion etch employed for formation of the line trench and a via cavity. The reduced line bias has a beneficial effect on electrical yields of a metal interconnect structure.

Abstract: User space applications can utilize custom network protocol timers. A registration request is received from an application to register a custom timer. Responsive to receiving the registration request, a handle is created. The handle is a pointer to be used by the application to reference the custom timer. The handle is forwarded to the application. When a custom timer is required, a request to use a custom timer is received from an application. The kernel is then requested to start the custom timer. A determination is then made as to whether a receipt confirmation is received from the kernel before expiration of the custom timer.

Abstract: In a data processing system including multiple logical partitions (LPARs), an application executes on a first logical partition (LPAR) of the multiple LPARs, where the application uses a first operation system stored in a first memory partition of a shared pool memory of the data processing system. A virtualization management component (a) initiates an update process that quiesces operations of the first LPAR, (b) pages in, via a virtual input/output server coupled to a first paging device, a first image of a second operating system from the first paging device to the shared pool memory; (c) changes one or more pointers associated with the application to point to one or more portions of the second operating system, such that the application uses the second operating system, when resumed; and (b) resumes execution the application.

Abstract: Methods and arrangements for extracting tuples from a streaming XML document. A query twig is applied to the XML document stream, tuples are extracted from the XML document stream based on the query twig, and a quantity of extracted tuples is limited via foregoing extraction of duplicate tuples extraction of tuples that do not satisfy query twig criteria.

Abstract: In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread.

Abstract: Selecting bins in a memory by receiving a target cost for performing writes at an analog memory that is capable of storing a range of values. Possible bins that may be created in the range of values and a cost associated with each possible bin are determined. Each possible bin includes one or more of the values. A group of bins are identified, the group of bins are among the possible bins with associated costs that are within a threshold of the target cost. A maximum number of bins are selected from the group of bins that have non-overlapping values. The selected bins are stored along with the values of the selected bins utilized to encode and decode contents of the analog memory.

Abstract: Techniques are disclosed for providing cross-tier management in a multi-tier computing system architecture. For example, a method for managing a computing system, wherein the computing system includes a first tier and at least a second tier, wherein the first tier and the second tier are configured to respond to a request received by the computing system, includes the steps of monitoring performance of the second tier from the first tier, and sending one or more management commands from the first tier to the second tier based on the monitored performance. In one embodiment, the first tier may be an application server tier of the computing system, and the second tier may be a database server tier of the computing system.

Abstract: The illustrative embodiments provide a mechanism for abstraction for arrays in integrated circuit designs. The mechanism constructs abstract models directly from an analysis of the system. The abstract models are both sound and complete for safety properties: a safety property holds in the abstract model if and only if the property holds in the original model. The mechanism of the illustrative embodiments eliminates the need for iterative abstraction refinement. The mechanism of the illustrative embodiments can find small models that verify a system in some cases where other approaches are unable to find a small model. The approach constructs an abstract design from the original design. The abstracted design may have smaller arrays than the original design. The mechanism checks the correctness of the abstracted design by model checking.

Abstract: A method for securing asynchronous client server transactions is provided in the illustrative embodiments. A request including an application identifier and a version of a second application is received at a first application. A service identifier is generated if a session with the second application is valid. A registry is generated at the first application. A catalog is generated based on the registry and the service identifier and the catalog are sent to the second application. A sub-request including the service identifier is received as part of an asynchronous client server transaction. Validity of the sub-request is determined by determining whether the service identifier has expired, whether the sub-request requests a service that is permissible according to the catalog, whether the service identifier is used in conjunction with the second application, or a combination thereof. If the sub-request is valid, the service is provided.

Abstract: A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of ?2 is selected where the initial value of ?2 is used to determine a light intensity and a wafer image. The light intensity for each pixel in the initial fictitious mask and the wafer image for each pixel in the initial fictitious mask are then determined. A determination is then made as to whether a convergence has been achieved by comparing the wafer image generated from the fictitious mask to the given target pattern. Responsive to a convergence of the wafer image generated from the fictitious mask to the given target pattern, a final mask is generated to use to transfer an image to a wafer.

Abstract: An illustrative embodiment of a computer-implemented process for single pass marking of finalizable objects marks strong roots, marks finalizable roots and determines whether a strong work stack is empty. Responsive to a determination the strong work stack is empty the computer-implemented process determines whether a finalizable work stack is empty. Responsive to a determination the finalizable work stack is empty, synchronize threads, the computer-implemented process finalizes finalizable roots and merges mark maps to finish parallel marking.