Abstract: A plurality of fin structures containing, from bottom to top, a non-doped semiconductor portion and a second doped semiconductor portion of a first conductivity type, extend upwards from a surface of a first doped semiconductor portion of the first conductivity type. A trapping material (e.g., an electron-trapping material) is present along a bottom portion of sidewall surfaces of each non-doped semiconductor portion and on exposed portions of each first doped semiconductor portion. Functional gate structures straddle each fin structure. Metal lines are located above each fin structure and straddle each functional gate structure. Each metal line is orientated perpendicular to each functional gate structure and has a bottommost surface that is in direct physical contact with a portion of a topmost surface of each of the second doped semiconductor portions.
Type:
Grant
Filed:
May 24, 2018
Date of Patent:
July 7, 2020
Assignee:
International Business Machines Corporatino
Inventors:
Ramachandra Divakaruni, Arvind Kumar, Carl J. Radens
Abstract: Techniques are disclosed herein for establishing a file transfer connection via wearable devices (e.g., head-mounted wearable devices). A service executing on a cloud platform receives a connection authentication request including authentication data from wearable devices, each associated with a mobile device. Upon validating the connection authentication request, a file transfer connection between the wearable devices is established. The service receives a request from one of the wearable devices to transfer a file maintained by an associated mobile device to another mobile device. Upon validating this request, the service sends an authorization to transfer the file.
Type:
Grant
Filed:
January 10, 2017
Date of Patent:
July 9, 2019
Assignee:
International Business Machines Corporatino
Inventors:
Su Liu, Jun Su, John D. Wilson, Yin Xia
Abstract: A method performs statistical static timing analysis of a network that includes a phase-locked loop and a feedback path. The feedback path comprises a set of delays operatively connected from the output of the phase-locked loop back to the input of the phase-locked loop. One embodiment herein computes a statistical feedback path delay for the feedback path. The method can use a separate statistical parameter to represent random uncorrelated delay variation for each delay in the feedback path. The method also computes an output arrival time for the phase-locked loop based on the negative of the statistical feedback path delay.
Type:
Application
Filed:
December 15, 2009
Publication date:
June 16, 2011
Applicant:
International Business Machines Corporatino
Inventors:
Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz