Abstract: A high-speed web server that generates an HTML file upon receipt of an HTTP request is described. The server includes an application executor device and an HTTP server device that receives the HTTP request and sends an HTTP response to the HTTP request. A method for sending an HTTP response in a server that generates an HTML file upon receipt of an HTTP request is also provided. The method includes: executing a script; calculating the number of appearances of the string; storing the string in a storage; executing a script when the script is a command for processing a string; replacing the string with reference information; and sending the string file along with the HTML file when it includes reference information for reference to the string file.

Abstract: A residue generator for calculation and correction of a residue value. The residue generator includes a residue-generation tree connected with an operand register at an input of the residue generator including a plurality of register-bits receiving and carrying bits of numerical data.

Abstract: A method and system for providing an energy efficient computer management environment via tightly integrated target status and directed work sessions. The illustrative embodiments query, by a lightweight communication means, an availability status of a target computer device using a status thread. The status of the target computer device is recorded in a memory of a central computer according to response from the server thread. Responsive to an absence of a response by the target computer, the illustrative embodiments query, by a heavyweight communication means, the status of the target computer device using the status thread.

Abstract: A computer-implemented method for protecting data being transferred during a session with an application is presented. In response to receiving a session request that includes an application identifier for an application, a data processing node establishes a session with the application and assigns a session identifier for that session. A session response, which includes the session identifier, to the session request is sent. In response to receiving a first request that includes the session identifier, a first pipe in the session is established. This first pipe enables data related to the first request to be isolated according to an assigned first pipe identifier for the first pipe. A first response to the first request is sent, wherein the first response comprises the session identifier and the first pipe identifier.

Abstract: A system and method for controlling preferences for messages that includes receiving a message from a sender to a recipient, determining if the message will be received by the recipient based on message policies for the recipient, and notifying the sender that the message will not be received by the recipient and when it will be received responsive to the determination that the message will not be received by the recipient.

Abstract: Embodiments of the invention include methods of transmitting a hidden message within a secured primary data transmission. In one embodiment, a method involves transmitting a primary data transmission over a computer network from a source host to a receiving host. Intentionally-corrupted packets are introduced within the primary data transmission in a manner providing a hidden message. For example, a pattern of intentionally-corrupted packets may be used to encode the hidden message. Alternatively, the hidden message may be embedded within the data area of the intentionally-corrupted packets. The intentionally-corrupted packets are received and interpreted at the receiving host to determine the hidden message.

Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive a system architecture model of a system and receive trigger coverage rules. Additionally, the programming instructions are operable to determine system integration test (SIT) coverage for each connection and interface of the system architecture model and select a set of use cases execution scenarios to satisfy the SIT coverage.

Abstract: The forcing of the result or output of a rounder portion of a floating point processor occurs only in a fraction non-increment data path within the rounder and not in the fraction increment data path within the rounder. The fraction forcing is active on a corner case such as a disabled overflow exception. A disabled overflow exception may be detected by inspecting the normalized exponent. If a disabled overflow exception is detected, the round mode is selected to execute only in the non-increment data path thereby preventing the fraction increment data path from being selected.

Abstract: A method, program and system for processing data is disclosed. The method, program and system comprising the steps of: (a) receiving (e.g., during an enrollment process) a first biometric data and a first personal key, (b) processing the first biometric data and the first personal key through an irreversible cryptographic algorithm, sometimes after: (i) generating one or more variants from the first biometric data, (ii) processing the first personal key through a reversible cryptographic algorithm, and (iii) adding salt to the first biometric data or first personal key, (c) receiving (e.g.

Abstract: An embodiment of the invention provides a semiconductor structure, which may include a stud of a first conductive material formed inside a dielectric layer; a via of a second conductive material having a bottom and sidewalls with the bottom and the sidewalls being covered by a conductive liner, and the bottom being formed directly on top of the stud and being in contact with the via through the conductive liner; and one or more conductive paths of a third conductive material connecting to the via through the conductive liner at the sidewalls of said the. A method of making the semiconductor structure is also provided.

Abstract: Methods and apparatuses are disclosed for direct access to cache memory. Embodiments include receiving, by a direct access manager that is coupled to a cache controller for a cache memory, a region scope zero command describing a region scope zero operation to be performed on the cache memory; in response to receiving the region scope zero command, generating a direct memory access region scope zero command, the direct memory access region scope zero command having an operation code and an identification of the physical addresses of the cache memory on which the operation is to be performed; sending the direct memory access region scope zero command to the cache controller for the cache memory; and performing, by the cache controller, the direct memory access region scope zero operation in dependence upon the operation code and the identification of the physical addresses of the cache memory.

Abstract: The present disclosure is directed to a method for managing tasks in a computer system having a plurality of CPUs. Each task in the computer system may be configured to indicate a migration ready indicator of the task. The migration ready indicator for a task may be given when the set of live data for that task reduces or its working set of memory changes. The method may comprise associating a migration readiness queue with each of the plurality of CPUs, the migration readiness queue having a front-end and a back-end; analyzing a task currently executing on a particular CPU, wherein the particular CPU is one of the plurality of CPUs; placing the task in the migration readiness queue of the particular CPU based on status of the task and/or the migration ready indicator of the task; and selecting at least one queued task from the front-end of the migration readiness queue of the particular CPU for migration when the particular CPU receives a task migration command.

Abstract: Identifying traffic patterns to web sites based on templates that characterize the arrival of traffic to the web sites is provided. Based on these templates, determinations are made as to which web sites should be co-located so as to optimize resource allocation. Web sites whose templates are complimentary, i.e. a first web site having a peak in arrival traffic at time t1 and a second web site that has a trough in arrival traffic at time t1, are designated as being candidates for co-location. In addition, the templates identified for the traffic patterns of web sites are used to determine thresholds for offloading traffic to other servers. These thresholds include a first threshold at which offloading should be performed, a second threshold that takes into consideration the lead time needed to begin offloading, and a third threshold that takes into consideration a lag time needed to stop offloading of traffic.

Abstract: Provided are a method, system, and article of manufacture for synchronizing controller firmware download. A master device controller receives a code download and sends the code download to a subordinate device controller. The master device controller requests a subordinate code status from the subordinate device controller indicating a status of the code download at the subordinate device controller and stores the received code download and a master code status for the download. The master device controller receives the subordinate code status from the subordinate device controller and compares the subordinate code status with the master code status to determine whether both are valid and at same code level. The master device controller updates the master code image with the code download and coordinating the update of the code download to the subordinate code image in response to determining that the master and subordinate code status are both valid and at the same code level.

Abstract: In one embodiment, the present invention is a method for allocation of finite computational resources amongst multiple entities, wherein the method is structured to optimize the business value of an enterprise providing computational services. One embodiment of the inventive method involves establishing, for each entity, a service level utility indicative of how much business value is obtained for a given level of computational system performance. The service-level utility for each entity is transformed into a corresponding resource-level utility indicative of how much business value may be obtained for a given set or amount of resources allocated to the entity. The resource-level utilities for each entity are aggregated, and new resource allocations are determined and executed based upon the resource-level utility information. The invention is thereby capable of making rapid allocation decisions, according to time-varying need or value of the resources by each of the entities.

Abstract: A specimen handling apparatus is provided and includes a body in which a bore is defined and a needle having a tip portion and a bit, which is removably insertible into the bore with the tip portion at least partially exposed, the bore and the bit each being formed such that, when the bit is inserted into the bore, the needle is forced into one of first or second rotational positions relative to a long axis thereof.

Abstract: A data storage apparatus and method. The apparatus comprises a mounting structure, a motor mechanically attached to mounting structure, and a data storage platter mechanically attached to the motor. The apparatus additionally comprises a single actuator arm comprising a first and second read/write data head or multiple radial movement mechanisms each comprising a read/write data head. The single actuator arm is configured to move axially along an arc and across a top surface of the data storage platter such that the first read/write data head has access to a first section and a second section of the data storage platter and the second read/write data head only has access to the second section of data storage platter. Each radial movement mechanism moves a different read/write data head radially all along a radius of the data storage platter and over and across different sections of the data storage platter.

Abstract: Memory devices are described along with methods for manufacturing. A memory device as described herein comprises a plurality of word lines overlying a plurality of bit lines, and a plurality of field effect transistors. Field effect transistors in the plurality of field effect transistors comprises a first terminal electrically coupled to a corresponding bit line in the plurality of bit lines, a second terminal overlying the first terminal, and a channel region separating the first and second terminals and adjacent a corresponding word line in the plurality of word lines. The corresponding word line acts as the gate of the field effect transistor. A dielectric separates the corresponding word line from the channel region. A memory plane comprises programmable resistance memory material electrically coupled to respective second terminals of the field effect transistors, and conductive material on the programmable resistance memory material and coupled to a common voltage.

Abstract: A software application recreation in a computing environment is provided. One embodiment involves analyzing program execution trace data of a software application, and using the analysis results in recreating an executable version of the software application from data traced at significant points during the software application execution. Recreating an executable version of the software application involves creating white space code to simulate the software application execution timing by replacing business logic code of the software application with white space code in the recreated executable version. The recreated executable version of the software application programmatically behaves essentially similarly to the software application.

Abstract: Programmable illuminators in exposure tools are employed to increase the degree of freedom in tool matching. A tool matching methodology is provided that utilizes the fine adjustment of the individual source pixel intensity based on a linear programming (LP) problem subjected to user-specific constraints to minimize the difference of the lithographic wafer data between two tools. The lithographic data can be critical dimension differences from multiple targets and multiple process conditions. This LP problem can be modified to include a binary variable for matching sources using multi-scan exposure. The method can be applied to scenarios that the reference tool is a physical tool or a virtual ideal tool. In addition, this method can match different lithography systems, each including a tool and a mask.