Abstract: A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.

Abstract: Several methods and structures are disclosed for determining electrical properties of silicon-on-insulator (SOI) wafers and alternate versions of such wafers such as strained silicon:silicon/germanium:-on-insulator (SSGOI) wafers. The analyzed electrical properties include mobilities, interface state densities, and oxide charge by depositing electrodes on the wafer surface and measuring the current-voltage behavior using these electrodes. In a single gate structure, the source and drain electrodes reside on the wafer surface and the buried insulator acts as the gate oxide, with the substrate acting as the gate electrode. In a double gate structure, an oxide is used on the upper surface between the source and drain electrodes and an additional metal layer is used on top of this oxide to act as a second gate electrode.

Abstract: A system for protecting an electronic device from mechanical intrusion attempt. An intrusion barrier able to detect mechanical intrusion by means of circuit traces which detect any change in the resistance characteristics of the electric circuit. These circuit traces function as a resistors and they are connected together to form a Wheatstone bridge. According to the present invention the logical lay-out of these connections is selected so that the voltage difference between two adjacent traces is minimized. In this way the current leakage effect is limited to the minimum.

Abstract: Methods for forming and the intermediate greensheet products formed are provided by attaching a removable support film to a first surface of a greensheet and a frame to a second surface of the greensheet. The support film is preferably a peelable support film cast to the first surface of the greensheet for providing strength thereto. A plurality of openings are formed in the greensheet by punching into the support film, through the support film and then through the greensheet. During this process, the support film provides added strength to the greensheet therein significantly reducing embossing and deformation of such greensheet. A second support film may be attached to the removable support film using an adhesive layer, which, is extruded into the openings upon attachment. The support film(s) may be peeled off the greensheet with little or no impact on via locations as a metal frame continues to support the greensheet.

Abstract: Provided is a method, system, program, and data structures for halftoning an input image comprised of at least two input color components. Each input color component provides input intensity values for the color component at pixel locations in the image. At least two halftoning screens are accessed. There is one screen for each color component and halftone output generated by at least one of the screens has a lines per inch (LPI) that is at least approximately twenty percent different than the LPI of halftone output generated by one other screen. The input image is separated into the separate color components. The accessed screen for each color component is applied to the input intensity values for the color component to produce output intensity values for the color component. The combined halftone outputs for all the color components form the output pixels.

Abstract: A handling system for use with a blade is disclosed. The blade is within a computer system. The handling system comprises a chassis for holding the blade and a first handle member coupled to the chassis. The handling system includes a second handle member coupled to the chassis and being oppositely disposed to the first handle member. Finally, the handling system includes a latching mechanism which holds the first and second handle member in a retracted position when engaged therewith. The latching member when activated causes the first and second handle members to spring out to a point where the first and second handle members can be used to remove the chassis from the computer system. A method and system in accordance with the present invention limits the handling system profile dimensionally by providing a spring-loaded latching mechanism for the handle members. In so doing, a blade server system is provided that has a smaller footprint than conventional server systems.

Abstract: The present invention provides a method, system, and computer program product for improving scheduling of tasks in systems that accumulate execution time. An upper bound is computed on the amount of additional time each schedulable task in the system may continue to execute after exceeding its predetermined cost, without adversely affecting overall operation of the system (that is, ensuring that the continued execution will not cause invocations of subsequent tasks to fail to meet their execution deadlines). By allowing tasks to run longer, the potential that the task will successfully end is increased, thereby yielding a more efficient overall system. In the preferred embodiment, the extensions are iteratively computed as a fixed percentage of the cost of each task until reaching an amount of time where the system is no longer feasible.

Abstract: An optoelectronic assembly for an electronic system includes a support electronic chip set configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions. A first substrate having a first surface and an opposite second surface is in communication with the support electronic chip set via the first surface while a second substrate is in communication with the second surface of the first substrate. The second substrate is configured for mounting at least one of data processing, data switching and data storage chips. An optoelectronic transducer is in signal communication with the support electronic chip set and an optical fiber array is aligned at a first end with the optoelectronic transducer and with an optical signaling medium at a second end.

Abstract: Methods and systems for handling physical device placement requests are provided. In general, a physical device placement request is any request for information pertaining to placement of a physical device (e.g., a direct access storage device and a PCI card) in a computer system. Illustratively, a request may specify machine specific information, base system information or purchase order information. The user-supplied request information is then combined with configuration information according to predefined rules. The resulting output is placement information which may be returned to the requester.

Abstract: A mechanism is provided for magnifying information with contextual information. The user may configure the magnification mechanism to present some contextual information along with the focus being magnified. Particularly, a user may set “look ahead” and “look behind” parameters to specify a number of words or characters to include before and after the magnified word or words. The actual magnified word or words may be distinguished from the contextual information. For example, the word or words being magnified may be magnified to a size that is larger than that of the contextual information. The magnification mechanism may also present a magnified display of image information.

Abstract: A method, system and computer program product for controlling information gathered by data collection agencies in an electronic transaction. A persona facet may be selected by a user of a client in a network system where the selected persona facet comprises user selectable information, e.g., name, e-mail address, unique key, public key, private key, payment method, consumer resource data, that may be exposed in the electronic transaction. The user may then connect to a web site via a web browser. Upon initiating an electronic transaction, the user may send the selected persona facet to the web site. If the web site recognizes the persona facet, then the user may request the web site to send the information about the user stored in a database, e.g., consumer resource management database. If the web site sends the information, then the user may compare the received information with the user selectable information in the selected persona facet.

Abstract: Provided is a method, system, and program for selecting a code image to execute. Multiple copies of a code image are maintained in a non-volatile memory device. A first operation routine is executed. A first counter is incremented if the first operation routine succeeds. A second operation routine is executed and a second counter is incremented if the second operation routine succeeds. The first and second counters are used to select one of the code images from the memory device to execute.

Abstract: A frequency divider circuit uses a base counter to frequency divide a clock signal with period T by an integer value N and employs a cyclic rotational select circuit to select among multiple equally phase shifted signals of a multiple phase clock to generate a fractional term P/k where P is variable from 0 to k?1. The counter counts an output clock that corresponds to the output of a multiplexer selecting from among the multiple clock phases. Depending on the desired fractional term, after N counts of the output clock phases of the multiple phase clock are selected glitch free by rotationally selecting a first phase, and skipping either 0, 1, 2 . . . up to k?1 sequential phases to generate fractional terms 0, 1/k, 2/k, 3/k . . . k?1/k, respectively, thus providing frequency division corresponding to N+P/k where P may be varied from 0 to k?1.

Abstract: This invention provides a dual usage cache reload buffer (CRB) to hold both demand loads as well as prefetch loads. A new form of a data cache block touch (DCBT) instruction specifies which level of the cache hierarchy to prefetch data into. A first asynchronous form of a DCBT instruction is issued to prefetch a stream of data into a L2 cache. A second synchronous form of a DCBT instruction is used to prefetch data from the L2 cache to the CRB in the main CPU, which will bypass the L1 data cache and forward data directly to the register file. This CRB has a dual usage and is used to hold both normal cache reloads as well as the aforementioned prefetched cache lines.

Abstract: Finite field elements from the Galois field GF(2k) are represented as polynomials with binary valued coefficients. As such, multiplication in the field is defined modulo an irreducible polynomial of degree k?1. One of the multiplicands is treated in blocks of polynomials of degree n?1 so that the multiplier operates over T cycles where k=nT. If k is not a composite number to start with, higher order terms are added, so that multipliers are now constructable even when k is prime. Since n<k, the construction of the needed multiplier circuits are much simpler. Designers are now provided with an opportunity of easily trading off circuit speed for circuit complexity in an orderly and structured fashion.

Abstract: A method, system, and program for billing for service provided to an origin device according to the current caller billing plan. A trusted telephone network, including at least one service provider, receives a request for service from an origin device. The origin device is associated with a line number to be billed for according to a line subscriber billing plan. An identity of a caller requesting the service from the origin device is authenticated. Then, a billing plan associated with the authenticated caller identity is accessed and utilized to replace or supplement the line subscriber billing plan, such that billing for service provided at an origin device is specified according to the caller currently utilizing the origin device.

Abstract: Disclosed is a system, method, and program for translating source code statements to executable code. A source code statement including an application program interface (API) that is a member of a set of standard APIs calling an object in a first format is processed. A mapping is used to determine at least one user interface API corresponding to the determined standard API. The user interface API provides an implementation of the standard APIs in a user interface program. A mapping is determined of the called object to a corresponding object in a second format utilized by the user interface program is accessed. The source code statement comprising the standard API calling the object in the first format is converted to the determined user interface API calling the corresponding object in the second format. The user interface program is capable of executing the user interface API calling the corresponding object.

Abstract: A computer system having a main memory for storing data in a compressed format and a processor cache for storing decompressed data, a method for converting the data of said main memory from compressed to uncompressed state, comprising the steps of reducing used portions of said main memory to a target value; disabling a compressor used for compressing the uncompressed data; decompressing said compressed data of said main memory; moving said decompressed data to physical addresses equal to real addresses; and releasing the memory occupied by a compressed memory director and data structures used in the above steps.

Abstract: A high-voltage input tolerant receiver capable of achieving power savings with less distortion of analog signals is disclosed. When an external signal ?C input from a PAD 2 is less than 3.6V, a p-channel MOS transistor P10 is turned off. As a result, a control signal ?E becomes 0V to turn on a p-channel MOS transistor P1. At this time, an intermediate signal ?D output from a clamp circuit 3 becomes equivalent to the external signal ?C, and is not distorted. However, when the external signal ?C exceeds 3.6V, the p-channel MOS transistor P10 is turned on, and a control signal ?F output from a differential amplifier 9 becomes 0V. As a result, the p-channel MOS transistor P1 is turned off, and a level keeper 6 is enabled. Since the level keeper 6 remains inactive until the external signal exceeds 3.6V, current flowing through the level keeper 6 can be reduced.

Abstract: A method, system, and apparatus for synchronizing device, node, and drawer addresses between two networks within a data processing system is provided. In one embodiment, a service processor assigns a plurality of SPCN addresses to each of a plurality of devices in the data processing system. System firmware then determines the RIO addresses corresponding to the plurality of devices. If one of the SPCN addresses is not the same as the RIO address for the corresponding device, node, or drawer, then the service processor reassigns a new SPCN address to the corresponding device, node, or drawer such that the new SPCN address is identical to the RIO address for a corresponding device, node, or drawer.