Abstract: A method, system and computer program product are disclosed for using shoppers for in-venue pick up of online orders. In an embodiment, the method comprises determining that an online order has been placed by a first shopper for a product in a venue, identifying a second shopper in a specified area to get the product, sending to the second shopper a message including a promotional offer in exchange for getting the product, receiving the product from the second shopper, and in response to receiving the product from the second shopper, honoring the promotional offer. In an embodiment, the second shopper is identified in a specified area relative to the venue. In an embodiment, the method further comprises determining a cost associated with getting the product in the store; and generating the promotional offer based, at least in part, on this determined cost associated with getting the product.

Abstract: Techniques for genetic programming based compression determination are described herein. An aspect includes adding a first plurality of randomly generated compression algorithms to a first set of compression algorithms. Another aspect includes determining a respective mutated version of each of the first plurality of randomly generated compression algorithms. Another aspect includes adding the determined mutated versions to the first set of compression algorithms. Another aspect includes evaluating and ranking the first set of compression algorithms based on respective achieved degrees of compression.

Abstract: Clustering a set of natural language queries NLQs based on a set of significant events retrieved from a corpus stored in a computer system is described. A set of NLQs is used by a search engine for searching a selected corpus to retrieve respective sets of significant events. The set of NLQs is clustered into a plurality of NLQ clusters according to a number of common significant events being returned by the search engine for respective members of an NLQ cluster.

Abstract: A configuration of wirebonds for reducing cross-talk in a quantum computing chip includes a first wirebond coupling a first conductor of a quantum computing circuit with a first conductor of an external circuit. The embodiment further includes in the configuration a second wirebond coupling a second conductor of the quantum computing circuit with a second conductor of the external circuit, wherein the first wirebond and the second wirebond are separated by a first vertical distance in a direction of a length of the first conductor.

Abstract: A multi-layer thermal interface material including two or more thermal interface materials laminated together, where each of the two or more thermal interface materials comprise different mechanical properties.

Abstract: Semiconductor devices and methods of forming the same include partially etching sacrificial layers in a first stack of alternating sacrificial layers and channel layers to form first recesses. A first inner spacer sub-layer is formed in the first recesses from a first dielectric material. A second inner spacer sub-layer is formed in the first recesses from a second dielectric material, different from the first dielectric material. The sacrificial layers are etched away. The first inner spacer sub-layer is etched away. A gate stack is formed on and around the channel layers and in contact with the second inner spacer sub-layer.

Abstract: A voltage droop mitigation system, that includes a first processor core that executes computer executable components stored in a memory. A time-based sensor component generates digital data representing voltage values associated with a power supply. A filtering component digitally conditions the generated digital data, and an analysis component analyzes the conditioned data and determines slope of the power supply voltage and employs counters to determine rate of data change over time; and if the slope is negative and exceeds a first pre-determined value for a pre-determined time period. The system implements one or more voltage droop-reduction techniques at the first processor core; and the first processor core transmits at least one of the following types of information: its voltage value, slope information or decision to apply droop reduction to one or more other cores.

Abstract: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.

Abstract: Predicting beneficial drug combinations mitigating adverse drug reactions identifies drug combinations and associated target adverse drug reaction from a spontaneous reporting system containing case reports of drugs and associated adverse drug reactions. Each drug combination comprises a first drug and a second drug, and a propensity score is computed for each drug in each group. This propensity score expresses a probability of being exposed to a given drug based on other co-prescribed drugs and reported indications, which reflect patient characteristics. Associations are computed for each drug as well as drug interaction. Among the associations, the sum of the associations of the second drug and the interaction effect represents the predicted beneficial score expressing whether the second drug alters the chance of developing the target adverse drug reaction for patients on the first drug.

Abstract: Techniques for planarization of dielectric topography that stop in dielectric are provided. In one aspect, a method for planarization includes: depositing a first dielectric onto a wafer having a surface topography with peaks and valleys; depositing a second, different dielectric onto the first dielectric; and polishing the second dielectric down to the first dielectric to form a planar surface at an interface between the first dielectric and the second dielectric. Optionally, a follow-up CMP or etch can be performed using a ˜1:1 selective polish or etch to completely remove the second dielectric and an equivalent amount of the first dielectric to form a planar surface devoid of the peaks and valleys in the first dielectric. A device structure formed by the present techniques is also provided.

Abstract: Traversing nodes of a Dispersed Lockless Concurrent Index (DLCI), by retrieving a node look-up request from a request queue, executing the look-up request across nodes of a DLCI, storing the look-up request results in a results queue, and adding new look-up requests associated with any node pointers from the node(s) of the look-up request, in the request queue.

Abstract: A method of cooling a heat generating enclosure includes setting a speed of each fan in a first array of fans, wherein each fan in the first array of fans is a first size, is disclosed. The method further includes measuring a process variable. The method also includes calculating a cooling strategy based at least in part on the value of the process variable. The method further includes setting the speed of each fan in the first array of fans or the speed of each fan in a second array of fans, wherein the second array of fans is in series to the first array of fans and each fan in the second array of fans is a second size, and wherein the speed of each fan that is set in the first or second array is set to implement the cooling strategy.

Abstract: Feedback tuples are implemented in a stream computing environment to provide data flow status information for use in detecting, identifying and/or handling data flow anomalies for a stream computing application.

Abstract: A method may include filling a via opening with a spacer, the via opening formed in a dielectric layer, forming a trench within the spacer, filling the trench with a metal layer, recessing the spacer to form an opening and expose an upper portion of the metal layer, wherein the exposed portion of the metal layer is formed into a cone shaped tip, conformally depositing a liner along a bottom and a sidewall of the opening and the exposed portion of the metal layer, depositing a second dielectric layer along the bottom of the opening on top of the liner, recessing the liner to form a channel and partially exposing a sidewall of the second dielectric layer and a sidewall of the metal layer, depositing a third dielectric layer in the channel, and depositing a phase change memory layer within the opening.

Abstract: A computer-implemented method, computer program product and system for data sampling in a storage system. The storage system includes a dataset comprising records and a buffer. The dataset is scanned record-by-record to determine whether the current record belongs to a random sample. If so, then the current record may be added to a first set of records. Otherwise, at least one storage score may be calculated or determined for the current record using attribute values of the current record. Next, it may be determined whether the buffer includes available size for storing the current record. In case the buffer comprises the available size, the current record may be stored in the buffer. Otherwise, at least part of the buffer may be free up. A subsample of the dataset may be provided as a result of merging the first set of records and at least part of the buffered records.

Abstract: Semiconductor devices and methods are provided. For example, a semiconductor device includes a plurality of semiconductor fins patterned in a starting semiconductor substrate; a set of gate structures formed on the starting semiconductor substrate; a set of spacers formed around each of the set of gate structures; a source and drain region grown around the plurality of semiconductor fins; a conductive metal material on the source and drain region, an insulating material disposed over an upper surface of the conductive metal material and the gate structure; and a plurality of metal contacts in the insulator material. The bottom surface of the plurality of metal contacts is in contact with at least a portion of an upper surface of the gate structure and at least a portion of an upper surface of the conductive metal material.

Abstract: A semiconductor structure and a method for fabricating the same. The semiconductor structure includes a substrate and a first source/drain layer in contact with at least the substrate. A vertical channel including indium gallium arsenide or germanium contacts at least the first/source drain layer. A gate structure contacts at least the vertical channel. A second source/drain layer contacts at least inner sidewalls of the vertical channel. The method includes epitaxially growing one or more fin structures comprising gallium arsenide in contact with a portion of a substrate. A separate channel layer comprising indium gallium arsenide or germanium is formed in contact with a respective one of the one or more fin structures.

Abstract: Methods, systems and computer program products are provided for visually indicating relationships among cells in a spreadsheet. Each of a first graphical linking element extending between cells in a first branch of a dependency tree of a root cell and a second graphical linking element extending between cells in a second branch of the dependency tree of the root cell is independently displayed and hidden.

Abstract: Mechanisms are provided for administering health care assessments to a patient. The mechanisms analyze patient information stored in a patient registry and determine a plurality of health care assessments to be administered to the patient based on the patient information and one or more pre-defined health care assessment guidelines specifying conditions for which health care assessments are to be administered to patients and timing for administering the assessments to the patients. The mechanisms generate a sequence of health care assessments, in the plurality of health care assessments, based on the guidelines and the patient information. The sequence comprises an ordering of the health care assessments, and a timing interval between health care assessments, determined based on the guidelines and the patient information. The mechanisms administer at least one health care assessment to the patient in accordance with the determined sequence of health care assessments.

Abstract: A computer-implemented method, according to one embodiment, includes: retrieving a physical block address corresponding to a logic block address, extracting information from the physical block address, and performing a lookup operation in cache using the extracted information. A range check of the physical block address is further performed in response to the lookup operation succeeding, while data is read from the cache in response to the range check succeeding. An architecture of the cache supports separation of data streams, as well as parallel writes to different non-volatile memory channels. The cache architecture further supports pipelining of the parallel writes to different non-volatile memory planes. Moreover, the non-volatile memory controller is configured to perform a direct memory lookup in the cache based on a physical block address.