Abstract: A method of analyzing timing reports in a microprocessor design for quick identification of all negative timing paths has been provided. Timing paths are first grouped and saved in a list file. A timing analysis program searches the timing report file for timing paths that match those in the list file. Summary reports have been generated for the existing timing paths. If there are new timing paths, summary reports for the new timing paths are generated. The new timing paths go through the same procedure until all negative timing paths are identified.

Abstract: Redefined hardware structured transactions and the associated responses in a data processing device are made user programmable. Three registers, a identifier register, a mask register and a response register, are used to redirect transactions or other operations within an application specific integrated circuit after post-silicon testing has been completed and there is no opportunity to redirect the hardware logic contained therein. When enabled, the registers allow for the insertion of blank table entries that can be programmed at a later time to handle unexpected output responses which occur due to unforeseen problems in the preprogrammed operation of the device. Transaction redirection can be accomplished on selected fields of identified tasctions. The method is applicable to any hardware device in which it is desired to redirect actions originally defined in look-up tables when such tables are not capable of adjustment or alteration without redesign or re-manufacture.

Abstract: An electronic package including an elastomeric member that supports a substantial portion of the load of a heat sink. The elastomeric member includes portions that are compressible to different degrees.

Abstract: An apparatus for cooling selected elements within an integrated circuit, such as active transistors or passive circuit elements used in a radio frequency integrated circuit is provided. In one embodiment, the cooling apparatus includes a cold plate thermally coupled to the region proximate the integrated circuit element, a thermoelectric cooler thermally coupled to the cold plate; and a hot plate thermally coupled to the thermoelectric cooler. Heat is removed from the integrated circuit element through the cold plate and transmitted to the hot plate through the thermoelectric cooler. In one form, the hot plate is located or coupled to an exterior surface of an integrated circuit, such that heat transmitted to the ambient from the integrated circuit element is dissipated into the atmosphere surrounding the integrated circuit. In another form, the hot plate is embedded in the integrated circuit substrate to locally cool elements of the integrated circuit while dumping the heat into the substrate.

Abstract: A data processing system and method are described for providing a networked printer's physical location. The printer, a server computer system, and client computer systems are coupled together utilizing a network. The server computer system first transmits a command to the printer to disable the print function of the printer. Entry of a physical location of the printer is then permitted. The print function of the printer is reenabled by the server computer system only in response to an entry of the physical location of the printer into the printer.

Abstract: Colored surfaces are represented in an illumination-invariant and pose-invariant manner through a color code book. Patches of each color surface are represented, under well-chosen illumination conditions and other imaging variations, as clusters in an optimal color space. For each surface, the color code book entries represent its clusters' means, covariance matrices, eigen values and eigen vectors. In addition, a corresponding semantic label is given to each surface's color code book entry to simplify image processing operations such as region localization and recognition as well as indexing and querying of image databases.

Abstract: A method makes a magnetic head having a top and a bottom, front and rear ends and an air bearing surface (ABS) at the front end, comprising the steps of forming first and second pole piece layers with the first and second pole piece layers separated by a write gap layer at the ABS and connected at a back gap that is recessed rearwardly in the head from the ABS; forming a zero throat height (ZTH) defining layer of baked photoresist that is sandwiched between the first and second pole piece layers with the ZTH defining layer having a rounded front edge where the first and second pole piece layers first separate from one another after the ABS to define the ZTH; and forming an insulation stack with a coil layer embedded therein between the first and second pole piece layers with the insulation stack placed so that the ZTH defining layer is located entirely between the ABS and the coil layer.

Abstract: A method and system in accordance with the present invention provides for invoking actions when changes are made in one information source on behlaf of dependent information sources or systems. The method and system comprises identifying at least one area of high impact in the information source, identifying the action to be taken when the information changes, monitoring the at least one high impact area for at least one change, and then invoking the action responsive to the at least one change to the high impact area. In so doing, changes made to one information source can immediately cause actions to be invoked on behalf of dependent information sources or other systems. The actions invoked can be as simple as sending a notification of the changed information, or it can be as complicated as invoking a callback procedure that is defined by the dependent information source that identified the high impact area.

Abstract: An electronic package including an elastomeric member that supports a substantial portion of the load of a heat sink. The elastomeric member includes portions that are compressible to different degrees.

Abstract: Test data is provided through shift registers, operated at a high clock rate comparable to or exceeding a normal high speed clock rate of a chip being tested, to each of a plurality of scan chains configured from registers present on the chip; respective latches of which are connected to inputs and outputs of logic array partitions to be tested. Reduced test clock rate of input and output circuits of the scan chains is accommodated by high speed source and sink shift registers. The source and sink registers are fully loaded and unloaded between consecutive test clock signals and test signals are preferably applied to and collected from the chip in a single serial string through a single pair of tester input/output pins.

Abstract: Apparatus and methods for performing switching of heat flow in magnetic refrigeration systems are provided. In one embodiment, microelectromechanical (MEM) switches are provided for switching from a heat absorption phase and a heat rejection phase of a magnetic refrigeration cycle. In other embodiments, these MEM switches are replaced by thermoelectric switches. The thermoelectric switches operate such that an “on” state is defined as heat flow being allowed by virtue of the thermal conductivity of the thermoelectric switch. An “off” state is defined as a net zero heat flow through the thermoelectric switch obtained by providing a current that is just sufficient to offset the heat flow through the thermoelectric switch due to its thermal conductivity. In some embodiments, the thermoelectric switches are “directly coupled” thermoelectric switches, meaning that they are energized by a direct electrical coupling to a current source.

Abstract: The present invention provides a method for controlling an entity's access to a resource based on observed behavior of the entity. The method assigns the entity a default authorization meta-tag. The method monitors the entity's behavior and updates the entity's meta-tag based upon the observed behavior. Accordingly, dynamic behavior-based access control is achieved.

Abstract: Magnetoresistive devices are disclosed which include a changeable magnetic region within which at least two magnetic states can be imposed. Upon magnetoresistive electrical interaction with the device, the relative orientation of the magnetic states of the changeable magnetic region, and a proximate reference magnetic region, can be sensed thereby providing a binary data storage capability. The present invention limits the electrical interaction to only a preferred portion of the changeable magnetic region, e.g., the portion within which the two magnetic states can be dependably predicted to be substantially uniform, and opposite of one another. Structures for limiting the electrical interaction to this preferred portion of the changeable magnetic region are disclosed, and include smaller interaction regions, and alternating areas of insulation and conductive, interaction regions, disposed proximate the changeable magnetic region.

Abstract: A method and system for eliminating peripheral device conflicts in a multibus data-processing system which includes a Peripheral Component Interconnect (PCI) plus having multiple slots for interconnecting peripheral devices in an automatically derived configuration and an Industry Standard Architecture (ISA) bus having multiple slots for interconnecting peripheral devices in a user-selected configuration. Each slot included within the ISA bus includes a reset line for temporarily disabling an associated slot in response to an application of electrical power to the data-processing system in order to prevent power transition problems. In response to an existing or potential device conflict brought about by a user-selected configuration, a control signal is selectively applied to the reset line for one or more slots included within the ISA bus, temporarily disabling those slots during normal operation of the data-processing system.

Abstract: A test apparatus and a method for testing an integrated circuit's data storage device's input/output signal pins for alternating current (AC) defects, by providing an interface that will couple each respective individual test contact, in a subset of said contacts, to a select plurality of the data storage input/output signal pins so that when a selected data string is introduced into the integrated circuit so that each input/output pin on a data storage device in the integrated circuit will be tested in sequence whereby the number of contacts required by the tester can be reduced.

Abstract: A wrap test for a communication interface unit used for a computer, etc. When a wrap tool 40 is connected to a SCSI device 10, a signal (TEMPWR) is output from an output device 38 to SCSI connectors 22 and 24 through a Y-type cable 14, then wrapped in the wrap tool 40 and returned to a SCSI controller 12 through resistors 28 and 30 as a signal (PSCSIWRAP) to recognize the wrap tool 40. Because the non-grounded end of a resistor 26 is connected to an input terminal of the SCSI controller 12, the resistors 28 and 30 are connected in parallel. The potential of the signal (PSCSIWRAP) is stabilized by the resistors 26, 28 and 30. If a single wrap tool is connected to the SCSI device 10, the potential of the signal (PSCSIWRAP) is stabilized by the resistors 26 and 28 or 30.

Abstract: A composite, layered, integrated circuit formed by bonding of insulator layers on wafers provides for combination of otherwise incompatible technologies such as trench capacitor DRAM arrays and high performance, low power, low voltage silicon on insulator (SOI) switching transistors and short signal propagation paths between devices formed on respective wafer layers of a chip. In preferred embodiments, an SOI wafer is formed by hydrophilic bonding of a wafer over an integrated circuit device and then cleaving a layer of the second wafer away using implanted hydrogen and low temperature heat treatment. Further wafers of various structures and compositions may be bonded thereover and connections between circuit elements and connection pads in respective wafers made using short vias that provide fast signal propagation as well as providing more numerous connections than can be provided on chip edges.

Abstract: An assembly, including a tool for measuring an applied force and its centroid relative to the center of the tool. A method of measuring and adjusting a force and its centroid applied to a semiconductor chip in a socket by an abutting heat sink consisting of the steps of inserting the tool in the socket, applying a heat sink on the tool, measuring the applied force and its centroid with respect to the center of the tool, adjusting the heat sink until the centroid of the applied force is substantially aligned with the center of the tool, removing the heat sink and tool, from the socket, substituting a semiconductor chip for the tool and reapplying the heat sink whereby the centroid of the force applied by the heat sink is substantially aligned with the center surface of the semiconductor chip in the semiconductor device.

Abstract: A distributed system structure for a large-way, symmetric multiprocessor system using a bus-based cache-coherence protocol is provided. The distributed system structure contains an address switch, multiple memory subsystems, and multiple master devices, either processors, I/O agents, or coherent memory adapters, organized into a set of nodes supported by a node controller. The node controller receives commands from a master device, communicates with a master device as another master device or as a slave device, and queues commands received from a master device. The node controller has a deterministic delay between latching a snooped command broadcast by the address switch and presenting the command to the master devices on the node controller's master device buses.

Abstract: A composition usable in hole filling of a metal layer and to planarize the metal layer is provided. The metal layer is part of a substrate which can be part of a multilayer printed circuit board or chip carrier. The composition comprises a fluoropolymer dielectric metal, a filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.