Abstract: High dynamic range, high class count, high input rate winner-take-all on neuromorphic hardware is provided. In some embodiments, a plurality of thermometer codes are received by a neurosynaptic core. The plurality of thermometer codes are split into a plurality of intervals. One of the plurality of intervals is selected. A local maximum is determined within the one of the plurality of intervals. A global maximum is determined based on the local maximum.

Abstract: A system is provided and includes a plurality of acoustic devices disposed in locations arrayed throughout a defined space, each one of the plurality of acoustic devices being receptive of acoustical attributes such as sound or noise levels generated in the defined space and configured to issue signals reflective of the generated acoustical attributes and an acoustic data unit disposed in signal communication with each of the plurality of acoustic devices. The acoustic data unit is receptive of the signals issued from the plurality of acoustic devices and configured to convert the signals into digital acoustic data and to output the digital acoustic data in a serialized format compatible with a network protocol.

Abstract: Described herein are methods, systems, apparatuses and products for efficient development of a rule-based system. An aspect provides a method including accessing data records; converting said data records to an intermediate form; utilizing intermediate forms to compute similarity scores for said data records; and selecting as an example to be provided for rule making at least one record of said data records having a maximum dissimilarity score indicative of dissimilarity to already considered examples.

Abstract: Described herein are methods, systems, apparatuses and products for efficient development of a rule-based system. An aspect provides a method including accessing data records; converting said data records to an intermediate form; utilizing intermediate forms to compute similarity scores for said data records; and selecting as an example to be provided for rule making at least one record of said data records having a maximum dissimilarity score indicative of dissimilarity to already considered examples.

Abstract: A tape library is provided with a fixed coupling mechanism so that the tape library includes discrete locations via which power and communication are provided to an accessor. The use of such a coupling mechanism in a vertical tape library allows for the use of gravity to ensure that the accessor can couple with the fixed coupling mechanism even when no power is present in the accessor.

Abstract: A method is disclosed of associating a mapping function with a configuration construct of a digital design defined by one or more hardware description language (HDL) files. According to the method, in the HDL files, a configuration latch is specified within a design entity forming at least a portion of the digital design. In addition, a Dial is specified that defines a relationship between each of a plurality of input values and a respective one of a plurality of different output values. The HDL files also include a statement that instantiates an instance of the Dial in association with the configuration latch such that a one-to-one correspondence exists between a value contained within the configuration latch and an input value of the instance of the Dial. The HDL files further include a statement associating the Dial with a mapping function that applies a selected transformation to values read from or written to the instance of the Dial.

Abstract: A method is provided for making a silicon-on-insulator substrate. Such method can include epitaxially growing a highly p-type doped silicon-containing layer onto a major surface of an underlying semiconductor region of a substrate. Subsequently, a non-highly p-type doped silicon-containing layer may be epitaxially grown onto a major surface of the p-type highly-doped epitaxial layer to cover the highly p-type doped epitaxial layer. The overlying non-highly p-type doped epitaxial layer can have a dopant concentration substantially lower than the dopant concentration of the highly p-type doped epitaxial layer. The substrate can then be processed to form a buried oxide layer selectively by oxidizing at least portions of the highly p-type doped epitaxial layer covered by the non-highly p-type doped epitaxial layer, the buried oxide layer separating the overlying monocrystalline semiconductor layer from the underlying semiconductor region.

Abstract: A method and semiconductor device. In the method, at least one partial via is etched in a stacked structure and a border is formed about the at least one partial via. The method further includes performing thick wiring using selective etching while continuing via etching to at least one etch stop layer.

Abstract: A method and system for preventing address resolution protocol (ARP) cache poisoning in a network system with multiple hosts. Multiple hosts representing and/or located in separate local area networks (LANS) are tapped (via a shared agreement) to utilize a trusted ARP cache for each LAN represented. Whenever a new ARP response is detected in one network, a request for validation is sent to a separate host in a different network. The separate host initiates a verification process for the ARP, which involves checking whether duplication of one of the IP address or MAC address of the ARP response exists within the address pairings in the ARP cache. If the ARP response is not validated, then the trusted ARP cache is not updated and the system administrator is notified of the failed attempt.

Abstract: A system for facilitating XML enable IMS transactions includes a generic XML processor inside an IMS connect program to facilitate any TCP/IP clients, including WebSphere and non-WebSphere, to send and receive XML documents to and from existing IMS transaction business logic. Translations between XML documents and IMS transaction message data structures occur within the IMS connect program under an XML task to parse and transform XML requests and responses. Further, the generic XML processor within the IMS connect program can provide data translation for both non-formatted and formatted IMS transactional messages in XML.

Abstract: A spin valve sensor includes an antiparallel (AP) pinned layer structure which is self-pinned without the assistance of an antiferromagnetic (AFM) pinning layer. A free layer of the spin valve sensor has first and second wing portions which extend laterally beyond a track width of the spin valve sensor and are exchange coupled to first and second AFM pinning layers. Magnetic moments of the wing portions of the free layer are pinned parallel to the ABS and parallel to major planes of the layers of the sensor for magnetically stabilizing the central portion of the free layer which is located within the track width.

Abstract: A method for automatically running a plurality of interactive programs that are necessary to complete a VLSI design and verification is disclosed. Layout data is completed and saved. Multiple programs of the VLSI logic are launched using this data. The submission of design programs (jobs) operate as programs “states” with each program state having data inputs, data outputs possibly receiving logic inputs and generating logic outputs. The data inputs and data outputs may be conditional in that they were generated from other program states that may not have executed error free. Logic routines generate the logic signals which are logic combinations of the generated logic outputs and these logic signals may be used to launch other program states. Once the method is started, a designer simply corrects errors that occur and then re-starts the design process.

Abstract: A method for monitoring performance of a program. A periodically occurring event is detected and a stack associated with the program is identified in response to a detection of the periodically occurring event, which may be a timer interrupt. The stack is examined to identify each routine (and specific invocation point, or offset) that is currently executing in association with the program. Each routine (and offset) is represented as a node in a tree structure.