Abstract: A single integrated circuit chip provides an interface to both magneto-resistive read elements and inductive write elements of a plurality of read/write heads of a disk drive mass data storage system. Separate multiplexers and current sources are used for the read and write channels. The read element of a head selected by one of the multiplexers is preamplified on the chip. A write driver circuit is also provided, being connected to a write element of a head selected by the other of the multiplexers.

Abstract: A digitally programmable Bessel filter includes a plurality of serially connected stages or biquads with each biquad including a plurality of programmable operational transconductance amplifiers. The first stage of the filter provides an all pass equal amplitude response. Two stages provide pulse slimming (first and second derivatives of an input pulse), and three stages provides a sixth order Bessel low pass function. The operational transconductance amplifiers are controlled by a fine tuning control signal, and an array of integrating capacitors are selectively controlled by a coarse tuning signal. The fine tuning and coarse tuning signals are generated in a phase locked loop from a reference clock and a reference biquad which receives the reference clock. The phase locked loop includes a phase detector responsive to the reference clock and the reference biquad, whose output is integrated.

Abstract: A digitally programmable Bessel filter includes a plurality of serially connected stages or biquads with each biquad including a plurality of programmable operational transconductance amplifiers. The first stage of the filter provides an all pass equal amplitude response. Two stages provide pulse slimming (first and second derivatives of an input pulse), and three stages provides a sixth order Bessel low pass function. The operational transconductance amplifiers are controlled by a fine tuning control signal, and an array of integrating capacitors are selectively controlled by a coarse tuning signal. The fine tuning and coarse tuning signals are generated in a phase locked loop from a reference clock and a reference biquad which receives the reference clock.

Abstract: The access time in reading data from a read only memory is enhanced by selectively inverting data stored in the memory. Each storage location along a wordline is weighted according to the distance of the bit location from the wordline driver, and bits stored therein are weighted by the bit location weight. The total weights of bits stored along the wordline are summed and compared with the maximum possible sum of weighted bits. If the ratio exceeds a preselected value, all bits of the wordline are inverted. The wordlines of a memory are provided with flag bits to indicate whether or not data stored on the wordline has been inverted.

Abstract: A method of designing an integrated circuit layout based on primitive elements such as transistors, resistors, and conductors and cell structures formed from the primitive functional element. The primitive elements are defined by surface dimensions, semiconductor construction, and surface layers and can be placed to accommodate special cell structures and functions. Design time can be minimized by using preexisting cell structures stored in suitable computer means, or layout surface and production costs can be minimized by designing new cell structures using a simple technique. Process independence can be achieved by having a complete design based on a small number of primitive elements which can be readily modified.

Abstract: A programmable read only memory (PROM) includes voltage programmable structures which are readily fabricated to provide predictable and selectable programming voltages. The resistor structure includes a body of semiconductor material having high electrical conductance and a surface contact region having a crystalline structure characterized by relatively high electrical resistance. The relatively high electrical resistance can be established by amorphotizing the surface region or by forming lattice defects in the crystalline structure such as by ion implantation. In programming the PROM, a sufficient voltage is applied across, or sufficient current is applied through, selected structures whereby the surface regions thereof are heated sufficiently to reduce the relatively high electrical resistance.