Abstract: A hierarchical array computer architecture comprised of a master computer connected to a plurality of node computers wherein each node has a memory segment. A high speed connection scheme between the master computer and the nodes allows the master computer or individual nodes conditional access to the node memory segments. The resulting architecture creates an array computer with a large distributed memory in which each memory segment of the distributed memory has an associated computing element; the entire array being housed in a blade server type enclosure. The array computer created with this architecture provides a linear increase of processing speed corresponding to the number of nodes.

Abstract: A new type of portable USB mass storage gadget is disclosed which provides the user with upgradeable high speed mass storage and processing for use with portable computer appliances such as smart phones and tablets as well as standard desk top computers and laptops. Various modifications to the embodiment referred to as a UDRIVE are disclosed including a battery option, wireless connectivity, security, and additional internal electronics and external interfaces that allow processing of the data stored or sent to the portable gadget.

Abstract: A new type of portable USB mass storage gadget is disclosed which provides the user with upgradeable high speed mass storage and processing for use with portable computer appliances such as smart phones and tablets as well as standard desk top computers and laptops. Various modifications to the embodiment referred to as a UDRIVE are disclosed including a battery option, wireless connectivity, security, and additional internal electronics and external interfaces that allow processing of the data stored or sent to the portable gadget.

Abstract: A universal memory bus coupled between a system's CPU and the system memory is composed of four channels; a primary channel, an identification channel, a programming channel and an expansion channel. The primary channel communicates operating system data necessary to boot the system. The identification channel communicates signals describing the device composition of the system memory. The programming channel communicates programming signals to all of the programmable memory devices within the system memory and thus allows complete programmability of those devices. The expansion channel provides data and programming access to a memory device subsequently added to the system memory.