Abstract: A forward converter circuit transfers a reset current to a capacitor each switching cycle that is independent of the value of input voltage. The reset current stored in a capacitor is transferred to an inductor and, in turn, transferred to a filter capacitor each cycle, thereby providing a semi-regulated voltage to a constant resistive load.
Abstract: The present invention provides a magnetics substrate for implementing a coupled transformer and inductor. In one version, the transformer and inductor are used in a DC to DC converter. The transformer includes primary and secondary windings, each comprising a set of planar windings coupled to one another in series and lying on planar surfaces of layers of the magnetics substrate. These planar windings are coaxially aligned along a transformer core axis which is orthogonal to the layers, and the primary and secondary windings are magnetically coupled to one another through a transformer core positioned along the transformer core axis. The inductor includes a set of planar windings coupled to one another in series and lying on planar surfaces of the layers.
Type:
Grant
Filed:
August 24, 1995
Date of Patent:
May 20, 1997
Assignee:
Interpoint Corporation
Inventors:
Lee I. Silberkleit, David R. Perchlik, Jason E. Douglass
Abstract: A secondary flyback core reset (SFCR) scheme for single-ended forward DC-to-DC converters is disclosed. The transformer secondary magnetizing inductor and a parasitic reset capacitance of the output forward rectifier diode form a secondary flyback reset circuit. The magnetic flux built up through the primary winding when the main switch is turned on is reset through this secondary flyback reset circuit when the main switch is turned off. The secondary flyback reset circuit initiates a half resonant cycle and resets the transformer. With proper design of the reset time, the maximum duty cycle of the main switch can go beyond 50%, while still using the first and third quadrants of the core B-H loop characteristics for optimum use of the core power density, and reduced RMS switching current and rectifier blocking voltages and power switch blocking voltage.