Abstract: A programmable logic gate array employing a plurality of reprogrammable fuses having a logical NAND characteristic for logically connecting selected inputs to selected logic gates. The fuses are selectively programmed for providing appropriate signals to allow three modes of operation of the logic gate array; programming, erasure and normal logic operation.
Abstract: A voltage divider circuit is provided which can be fabricated as a portion of a monolithic integrated circuit without requiring any external capacitors. The voltage divider circuit has a pair of capacitors which are alternately switched between series connection and parallel connection to divide an input supply voltage. The voltage divider circuit can thereby provide a second supply voltage of one half the input supply voltage.