Patents Assigned to INTERUNIVERSITY MICROELECTRONICS CENTRE
  • Publication number: 20220067224
    Abstract: A parallel processing designing device includes: an observation point computing section that, in a case in which an order of plural design variables exceeds a predetermined order, eliminates a design variable that has a low contribution to designing, and for each of plural design variables that are less than or equal to the predetermined order, computes plural observation points for searching for a region in which a performance relating to the design variable is executable, by using an acquisition function and a penalty function; a probability distribution computing section that, for each of the plural performances, computes a probability distribution of the performance being executable at the computed plural observation points; and a multiple performance executable region outputting section that outputs, as a multiple performance executable region, an infinite product of the probability distributions that are respectively computed for the plural performances.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 3, 2022
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, INTERUNIVERSITY MICROELECTRONICS CENTRE
    Inventors: Tomotaka Sugai, Kohei Shintani, Ivo Couckuyt, Nicolas Knudde, Jixiang Qing, Tom Dhaene