Patents Assigned to InvertIT
  • Publication number: 20240303300
    Abstract: A method for maintaining ownership integrity of templated executable graph-based models is provided. A node template that comprises a predetermined node structure and rules governing generation of node instances is obtained. A bounded executable run-time node is generated. The bounded executable run-time node comprises the node template, a node instance, and an overlay structure. The overlay structure comprises a run-time overlay and an ownership overlay. The run-time overlay comprises an overlay template and an overlay instance that includes processing logic for interaction with the node template and/or the node instance during execution. The overlay ownership overlay defines an ownership rule associated with the bounded executable run-time node. A stimulus and an associated context are received and, in response to the stimulus being received, execution of the processing logic of the run-time overlay is caused in accordance with the ownership rule of the ownership overlay.
    Type: Application
    Filed: August 17, 2023
    Publication date: September 12, 2024
    Applicants: INFOSYS LIMITED, InvertIT, Inc.
    Inventor: STEVEN SCHILDERS
  • Publication number: 20240296185
    Abstract: An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes various executable nodes that communicate with each other by way of messages. The executable graph-based model further includes a message node for each message associated with the overlay system. Each message node is associated with one or more time-series analytics overlay nodes that execute a corresponding set of time-series computation functions on the corresponding message node. A publisher overlay node associated with each time-series analytics overlay node may generate and publish a statistical insight based on an output of each corresponding time-series computation function. The processing circuitry may use the statistical insight to generate an analytics outcome.
    Type: Application
    Filed: February 26, 2024
    Publication date: September 5, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289391
    Abstract: An overlay system provided, includes processing circuitry and storage circuitry that stores primary executable graph-based models and auxiliary executable graph-based models. Each primary executable graph-based model is mapped to one or more auxiliary executable graph-based models based on various rules. The processing circuitry receives a stimulus associated with the overlay system and identifies, based on the stimulus, a primary executable graph-based model and one or more rules. Further, one or more values associated with an auxiliary executable graph-based model that is mapped to the primary executable graph-based model are retrieved based on the one or more rules. One or more values associated with the primary executable graph-based model are populated based on the retrieved one or more values. The processing circuitry further executes an operation associated with the stimulus based on the primary executable graph-based model that is populated with the one or more values.
    Type: Application
    Filed: February 23, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240288841
    Abstract: An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes various active nodes, various history nodes, and various history overlay nodes. Each active node is associated with one or more history nodes and one or more history overlay nodes. The one or more history overlay nodes facilitate the generation and maintenance of one or more history nodes (e.g., one or more historical versions of the corresponding active node). The processing circuitry receives a contextualized stimulus associated with the overlay system and identifies an active node and one or more associated history nodes, in the executable graph-based model based on the context. The processing circuitry further executes an operation associated with the stimulus based on the identified active node, the associated one or more history overlay nodes, and the identified one or more history nodes.
    Type: Application
    Filed: February 21, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven Schilders
  • Publication number: 20240289653
    Abstract: An executable inference hypergraph representing a rule-based model, the executable inference hypergraph comprising a first hyperedge associated with a first inference rule of the rule-based model and encapsulating a plurality of value nodes storing a plurality of values such that the plurality of values form a part of a set of terms used to evaluate the first inference rule, wherein the plurality of value nodes include at least one of the one or more value nodes of a graph-based model. The executable inference hypergraph further comprising a rule overlay node coupled to the first hyperedge thereby forming a first executable inference rule, wherein the rule overlay node comprises processing logic operable to evaluate the first inference rule using the set of terms encapsulated by the first hyperedge. The executable inference hypergraph is executed to determine an inference outcome.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT
    Inventor: Steven SCHILDERS
  • Publication number: 20240289311
    Abstract: An overlay system is provided that includes processing circuitry and a storage element that stores an executable graph-based model including various active nodes, various history message nodes, and various history overlay nodes. Each active node is associated with one or more history overlay nodes that facilitate the creation and maintenance of one or more history message nodes associated therewith. The processing circuitry receives a contextualized stimulus and identifies an active node and one or more history message nodes in the executable graph-based model based on the context. The processing circuitry creates one or more history nodes (e.g., one or more historical versions of the corresponding active node) based on the one or more history message nodes. Further, the processing circuitry executes an operation associated with the stimulus based on the identified active node, the one or more history overlay nodes, and the created one or more history nodes.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven Schilders
  • Publication number: 20240289315
    Abstract: An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes node templates, node instances, and index nodes. Each node template is associated with one or more node instances and one or more index nodes. Further, each index node includes index records. The processing circuitry receives a contextualized stimulus associated with the overlay system and identifies one or more index records that include an index value indicated by the contextualized stimulus. Based on the identified one or more index records, the processing circuitry further identifies one or more node instances required for stimulus processing. Further, the processing circuitry executes an operation associated with the stimulus based on the identified one or more node instances and each node template associated with the identified one or more node instances.
    Type: Application
    Filed: February 15, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289327
    Abstract: An overlay system is provided that includes a storage element and processing circuitry coupled thereto. The storage element stores an executable graph-based model including a plurality of nodes, a plurality of rule overlay nodes, and a plurality of data analysis overlay nodes. The processing circuitry receives a stimulus indicative of a data analysis operation and identifies a first node, a rule overlay node associated with the first node, and a data analysis overlay node associated with the first node. The processing circuitry executes a set of rules associated with the rule overlay node on a composition of the first node to generate a set of outputs. The data analysis overlay node uses the set of outputs to determine whether a data analysis score associated with the first node exceeds a data analysis score threshold.
    Type: Application
    Filed: February 26, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, InvertIT Inc.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289390
    Abstract: An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes various executable nodes that communicate with each other by way of messages. The executable graph-based model further includes a message node for each message associated with the overlay system. Each message node is associated with one or more analytics overlay nodes that execute a corresponding set of analytics operations on composition of the corresponding message node to generate one or more analytic insights. The composition includes data and transactional information associated with the corresponding message node. A publisher overlay node associated with the one or more analytics overlay nodes may generate and publish an analytics outcome based on an output of the execution of the set of analytics operations. The analytics outcome is indicative of performance of the overlay system.
    Type: Application
    Filed: February 23, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289392
    Abstract: An overlay system is provided that includes a plurality of storage elements and processing circuitry coupled thereto. The plurality of storage elements store a plurality of executable graph-based models such that first and second storage elements store first and second executable graph-based models, respectively. Each executable graph-based model includes a plurality of nodes. The processing circuitry receives a stimulus to share a first node of the first executable graph-based model with a second node of the second executable graph-based model. The processing circuitry instantiates a tenant overlay node that is associated with the second node and includes a set of constraints to be adhered to by the second node while sharing the first node. The processing circuitry creates a sharing channel as a medium between the first and second storage elements. The sharing channel and the tenant overlay node enable sharing of the first node with the second node.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289484
    Abstract: An overlay system including processing circuitry and storage element that stores various base nodes and various security overlay nodes, is provided. Each base node is associated with one or more security overlay nodes that control access to the information value contained in the base node. The processing circuitry receives a contextualized stimulus that indicates a requirement for associating two or more nodes. The processing circuitry identifies two base nodes required for processing the contextualized stimulus and executes an operation on the two identified base nodes to create an aggregated node. Thus, the aggregated node contains a higher information value than the two identified base nodes. Consequently, the processing circuitry dynamically associates, with the aggregated node, one or more security overlay nodes that have an equal or higher security level than the security levels of security overlay nodes associated with the two identified base nodes.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289483
    Abstract: An overlay system is provided that includes a primary storage element, a plurality of auxiliary storage elements, and processing circuitry. The primary storage element stores an executable graph-based model having a plurality of nodes. The processing circuitry receives a first stimulus indicative of a data splintering instruction. Based on the first stimulus, the processing circuitry identifies a first node in the executable graph-based model and executes a data splintering operation on the first node to divide the first node into a plurality of splinters. The processing circuitry, based on the first stimulus, instantiates a plurality of location overlay nodes and associates the plurality of location overlay nodes with the plurality of splinters. Based on the association, the processing circuitry stores each splinter of the plurality of splinters in an auxiliary storage element indicated by a corresponding location overlay node.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, InvertIT Inc.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289587
    Abstract: An artificial neural network (ANN) modelled as an overlay hypergraph comprising a plurality of hyperedges, a plurality of role nodes, and one or more overlay nodes. A hyperedge of the plurality of hyperedges represents an artificial neuron within the ANN and comprises a set of role nodes each of which representing a portion of a connective relationship within the ANN. A role node of the plurality of role nodes represents a connection between layers of the ANN and comprises a first connective relationship associated with a first hyperedge and a second connective relationship associated with a second hyperedge such that the role node functionally connects the first hyperedge and the second hyperedge. The one or more overlay nodes comprise processing logic operable to interact with at least one hyperedge or at least one role node coupled to the one or more overlay nodes.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven SCHILDERS
  • Publication number: 20240289328
    Abstract: A graph-based model comprises a plurality of entity nodes indicative of a plurality of entities within a dataset and a hierarchical structure of nodes. The hierarchical structure of nodes include a plurality of data nodes indicative of a plurality of data values associated with the plurality of entities and a plurality of context nodes coupled between the plurality of entity nodes and the plurality of data nodes. The plurality of context nodes define contextual relationships between the plurality of entity nodes and the plurality of data nodes. A query comprising a query value is received and a node within the hierarchical structure of nodes is identified based on the query value. A traversal path is determined from the node to a first entity node related to the node and a response to the query is generated based on the traversal path.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 29, 2024
    Applicants: INFOSYS LIMITED, INVERTIT INC.
    Inventor: Steven Schilders
  • Patent number: 12056190
    Abstract: A method for dynamic execution of sub-graphs within executable graph-based models is provided. Processing circuitry obtains an executable graph-based model comprising a plurality of sub-graphs and an overlay structure comprising processing logic associated with the plurality of sub-graphs. Each sub-graph defines a hierarchical structure of related nodes. The processing circuitry receives a stimulus and a context associated with the stimulus. In response to the stimulus being received and based on the context, the processing circuitry maps the stimulus to a first sub-graph of the executable graph-based model. The processing circuitry causes execution of processing logic within the overlay structure based on the mapping. The processing logic is associated with one or more nodes of the first sub-graph.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: August 6, 2024
    Assignees: INFOSYS LIMITED, INVERTIT
    Inventor: Steven Schilders
  • Publication number: 20240256602
    Abstract: A system comprises an executable graph-based model. The executable graph-based model comprises a first overlay node. The first overlay node comprises processing logic that is operable to interact with one or more associated nodes of the executable graph-based model. Further, the executable graph-based model comprises a first node that has the first overlay node associated therewith. The system further comprises a processing unit configured to receive a first stimulus associated with the first overlay node and, in response to the first stimulus being received, cause execution of said processing logic of the first overlay node. Execution of said processing logic of the first overlay node is based on the first node.
    Type: Application
    Filed: March 14, 2023
    Publication date: August 1, 2024
    Applicants: INFOSYS LIMITED, InvertIT
    Inventor: Steven SCHILDERS
  • Publication number: 20240256606
    Abstract: A system comprises an executable graph-based model. The executable graph-based model comprises a first overlay node. The first overlay node comprises processing logic that is operable to interact with one or more associated nodes of the executable graph-based model. Further, the executable graph-based model comprises a first node that has the first overlay node associated therewith. The system further comprises a processing unit configured to receive a first stimulus associated with the first overlay node and, in response to the first stimulus being received, cause execution of said processing logic of the first overlay node. Execution of said processing logic of the first overlay node is based on the first node.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 1, 2024
    Applicants: INFOSYS LIMITED, InvertIT
    Inventor: STEVEN SCHILDERS
  • Publication number: 20240256604
    Abstract: A method for access management in graph-based model is provided. The graph-based model comprises a plurality of nodes and an overlay structure comprising processing logic. The overlay structure is associated with one or more nodes of the plurality of nodes. Processing circuitry determines a first node group of the graph-based model. The first node group comprises at least one node. The processing circuitry associates a first contract with the first node group such that the first contract is configured to act as a proxy for one or more nodes within the first node group in relation to requests from outside the first node group. The processing circuitry receives a stimulus and a context associated therewith. The stimulus is associated with the first contract. The processing circuitry maps the stimulus to the first contract to determine an access response. The processing circuitry processes the stimulus based on the access response.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 1, 2024
    Applicants: Infosys Limited, InvertIT
    Inventor: Steven SCHILDERS
  • Publication number: 20240256605
    Abstract: A method for dynamic execution of sub-graphs within executable graph-based models is provided. Processing circuitry obtains an executable graph-based model comprising a plurality of sub-graphs and an overlay structure comprising processing logic associated with the plurality of sub-graphs. Each sub-graph defines a hierarchical structure of related nodes. The processing circuitry receives a stimulus and a context associated with the stimulus. In response to the stimulus being received and based on the context, the processing circuitry maps the stimulus to a first sub-graph of the executable graph-based model. The processing circuitry causes execution of processing logic within the overlay structure based on the mapping. The processing logic is associated with one or more nodes of the first sub-graph.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 1, 2024
    Applicants: INFOSYS LIMITED, InvertIT
    Inventor: Steven SCHILDERS