Patents Assigned to IP Reservoir, LLC
  • Patent number: 10467692
    Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to generate a plurality of financial market data messages from a plurality of the data fields, each generated message having a specified message format.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: November 5, 2019
    Assignee: IP RESERVOIR, LLC
    Inventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
  • Patent number: 10411734
    Abstract: Disclosed herein are methods and systems for hardware-accelerating various data processing operations in a rule-based decision-making system such as a business rules engine, an event stream processor, and a complex event stream processor. Preferably, incoming data streams are checked against a plurality of rule conditions. Among the data processing operations that are hardware-accelerated include rule condition check operations, filtering operations, and path merging operations. The rule condition check operations generate rule condition check results for the processed data streams, wherein the rule condition check results are indicative of any rule conditions which have been satisfied by the data streams. The generation of such results with a low degree of latency provides enterprises with the ability to perform timely decision-making based on the data present in received data streams.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 10, 2019
    Assignee: IP RESERVOIR, LLC
    Inventors: Ronald S. Indeck, David Mark Indeck, Naveen Singla, Jason R. White
  • Patent number: 10360632
    Abstract: Systems and methods are disclosed for fast track routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, reconfigurable logic device, a shared memory that is mapped into a kernel and user space of an operating system for the processor, a network protocol stack, and driver code for execution within the kernel space of the operating system while the operating system is in the kernel mode. The driver code can be configured to (1) maintain a kernel level interface into the network protocol stack, (2) copy the streaming data from the network protocol stack into the shared memory, wherein the copy operation is performed by the driver code without the operating system transitioning to the user mode, and (3) facilitate DMA transfers of data from the shared memory into the reconfigurable logic device for processing thereby.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: July 23, 2019
    Assignee: IP Reservoir, LLC
    Inventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
  • Patent number: 10346181
    Abstract: Methods and systems are disclosed where a plurality of precompiled hardware templates are stored in memory, each of the hardware templates being configured for loading onto a re-configurable logic device such as a FPGA to define a data processing operation to be performed by the re-configurable logic device, each of the data processing operations defined by the precompiled hardware templates having an associated performance characteristic. A processor selects a precompiled hardware template from a plurality of the precompiled hardware templates in the memory for loading onto the re-configurable logic device based at least in part on the associated performance characteristics of the data processing operations defined by the precompiled hardware templates.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: July 9, 2019
    Assignee: IP Reservoir, LLC
    Inventors: Roger D. Chamberlain, Mark Allen Franklin, Ronald S. Indeck, Ron K. Cytron, Sharath R. Cholleti
  • Patent number: 10229453
    Abstract: A basket calculation engine is deployed to receive a stream of data and accelerate the computation of basket values based on that data. In a preferred embodiment, the basket calculation engine is used to process financial market data to compute the net asset values (NAVs) of financial instrument baskets. The basket calculation engine can be deployed on a coprocessor and can also be realized via a pipeline, the pipeline preferably comprising a basket association lookup module and a basket value updating module. The coprocessor is preferably a reconfigurable logic device such as a field programmable gate array (FPGA).
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: March 12, 2019
    Assignee: IP RESERVOIR, LLC
    Inventors: David E. Taylor, Naveen Singla, Benjamin C. Brodie, Nathaniel Sutton McVicar, Justin Ryan Thiel, Ronald S. Indeck
  • Patent number: 10191974
    Abstract: Disclosed herein are methods and systems for integrating an enterprise's structured and unstructured data to provide users and enterprise applications with efficient and intelligent access to that data. In accordance with exemplary embodiments, the generation of classification information about unstructured data can be hardware-accelerated by processing streaming unstructured data through a reconfigurable logic device, a graphics processor unit (GPU), or chip multi-processor (CMP) to generate the classification metadata about the unstructured data.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: January 29, 2019
    Assignee: IP RESERVOIR, LLC
    Inventors: Ronald S. Indeck, David Mark Indeck, Naveen Singla, David E. Taylor
  • Patent number: 10169814
    Abstract: A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to synthesize quote events associated with a plurality of financial instruments from a financial market data feed.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: January 1, 2019
    Assignee: IP RESERVOIR, LLC
    Inventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
  • Patent number: 10158377
    Abstract: Disclosed herein are methods and systems for hardware-accelerating various data processing operations in a rule-based decision-making system such as a business rules engine, an event stream processor, and a complex event stream processor. Preferably, incoming data streams are checked against a plurality of rule conditions. Among the data processing operations that are hardware-accelerated include rule condition check operations, filtering operations, and path merging operations. The rule condition check operations generate rule condition check results for the processed data streams, wherein the rule condition check results are indicative of any rule conditions which have been satisfied by the data streams. The generation of such results with a low degree of latency provides enterprises with the ability to perform timely decision-making based on the data present in received data streams.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: December 18, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Ronald S. Indeck, David Mark Indeck, Naveen Singla, Jason R. White
  • Patent number: 10146845
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a mapped variable field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: December 4, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Patent number: 10133802
    Abstract: Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: November 20, 2018
    Assignee: IP Reservoir, LLC
    Inventors: Joseph M. Lancaster, Kevin Brian Sprague
  • Patent number: 10121196
    Abstract: Various techniques are disclosed for offloading the processing of data packets that contain financial market data. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize financial market data in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 6, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Scott Parsons, David E. Taylor, Ronald S. Indeck
  • Patent number: 10102260
    Abstract: Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: October 16, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Joseph M. Lancaster, Michael John Henrichs, Terry Tidwell, Alex St. John, Kevin Brian Sprague
  • Patent number: 10062115
    Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order books.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: August 28, 2018
    Assignee: IP Reservoir, LLC
    Inventors: David E. Taylor, Scott Parsons, Jeremy Walter Whatley, Richard Bradley, Kwame Gyang, Michael DeWulf
  • Patent number: 10037568
    Abstract: An integrated order management engine is disclosed that reduces the latency associated with managing multiple orders to buy or sell a plurality of financial instruments. Also disclosed is an integrated trading platform that provides low latency communications between various platform components. Such an integrated trading platform may include a trading strategy offload engine.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: July 31, 2018
    Assignee: IP Reservoir, LLC
    Inventors: David Taylor, Scott Parsons
  • Patent number: 9990393
    Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: June 5, 2018
    Assignee: IP Reservoir, LLC
    Inventors: Scott Parsons, David E. Taylor, Ronald S. Indeck
  • Patent number: 9916622
    Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to map the symbols present in the financial market data messages to another symbology.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: March 13, 2018
    Assignee: IP Reservoir, LLC
    Inventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
  • Patent number: 9898312
    Abstract: Methods and systems are disclosed where a plurality of precompiled hardware templates are stored in memory, each of the hardware templates being configured for loading onto a re-configurable logic device such as a FPGA to define a data processing operation to be performed by the re-configurable logic device, each of the data processing operations defined by the precompiled hardware templates having an associated performance characteristic. A processor selects a precompiled hardware template from a plurality of the precompiled hardware templates in the memory for loading onto the re-configurable logic device based at least in part on the associated performance characteristics of the data processing operations defined by the precompiled hardware templates.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: February 20, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Roger D. Chamberlain, Mark Allen Franklin, Ronald S. Indeck, Ron K. Cytron, Sharath R. Cholleti
  • Patent number: 9672565
    Abstract: Methods and systems for processing financial market data using a reconfigurable logic device are disclosed. Various operations such as volume weighted average price (VWAP) operations can be performed on the financial market data using firmware logic deployed on the reconfigurable logic device to accelerate the speed of processing.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: June 6, 2017
    Assignee: IP RESERVOIR, LLC
    Inventors: Scott Parsons, David E. Taylor, David Vincent Schuehler, Mark A. Franklin, Roger D. Chamberlain
  • Patent number: 9633093
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: April 25, 2017
    Assignee: IP Reservoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Patent number: 9633097
    Abstract: Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: April 25, 2017
    Assignee: IP Reservoir, LLC
    Inventors: Terry Tidwell, Alex St. John, Daniel Sewell