Patents Assigned to ITM SEMICONDUCTOR CO., LTD
  • Patent number: 11605959
    Abstract: Provided is a battery control system-in-package including a package substrate, a wireless charger integrated circuit (IC) module mounted on the package substrate, a wired charger IC module mounted on the package substrate, a battery protection IC module mounted on the package substrate, and a single mold provided on the package substrate to encapsulate the wireless charger IC module, the wired charger IC module, and the battery protection IC module.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 14, 2023
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Ja Guen Gu, Chi Sun Song, Seong Beom Park, Sun Ho Kim
  • Patent number: 11452213
    Abstract: Provided is a method of fabricating a battery protection circuit package, the method including preparing a complex package substrate obtained by connecting a flexible printed circuit board (PCB) including at least one external connection terminal for connection to an external device, to a rigid PCB for mounting components thereon, mounting the complex package substrate on a lead frame including at least one metal tab for connection to a battery cell, and encapsulating at least portions of the complex package substrate and the lead frame with a molded part while exposing the at least one metal tab and the at least one external connection terminal.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: September 20, 2022
    Assignee: ITM SEMICONDUCTOR CO., LTD
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Sang Hoon Ahn, Hyun Seok Lee
  • Patent number: 11375623
    Abstract: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 28, 2022
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
  • Patent number: 10950845
    Abstract: Provided is a battery protection circuit module package capable of easily achieving high integration and size reduction. The battery protection circuit module package includes a terminal lead frame including a first internal connection terminal lead and a second internal connection terminal lead provided at two edges of the terminal lead frame and electrically connected to electrode terminals of a battery bare cell, and a plurality of external connection terminal leads provided between the first and second internal connection terminal leads and serving as a plurality of external connection terminals, and a device package including a substrate mounted on the terminal lead frame to be electrically connected to the terminal lead frame, and providing a battery protection circuit device thereon.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: March 16, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD
    Inventors: Ho-seok Hwang, Young-Seok Kim, Seong-beom Park, Sang-hoon Ahn, Tae Hwan Jung, Seung-uk Park, Jae-ku Park, Myoung-Ki Moon, Hyun-suck Lee, Da-Woon Jung
  • Patent number: 10900855
    Abstract: Provided is a pressure sensor apparatus including a lead frame, a pressure sensing element mounted on the lead frame to measure a relative pressure between a first part and a second part, and a housing including a reference medium inlet hole to apply a pressure of a reference medium to the first part, and including a target medium inlet hole to apply a pressure of a target medium to the second part, wherein the reference medium inlet hole is provided in a first surface of the housing, wherein the target medium inlet hole is provided in a second surface of the housing other than the first surface, and wherein the lead frame includes one or more insertion terminals configured to be inserted into and electrically connected to terminal holes of a wire connector.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: January 26, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Ja Guen Gu, Dong Hee Lee, Hyang Won Kang, Hyung Jin Lim, Yeong Seol Kwon
  • Patent number: 10845378
    Abstract: Provided are a multi-sensor device capable of implementing a pressure sensor function and an acceleration sensor function by using one housing, and a method of manufacturing the multi-sensor device. The multi-sensor device may include a lead frame, a pressure sensing element electrically connected to the lead frame and being capable of measuring a relative pressure between a first part and a second part thereof, an acceleration sensor module electrically connected to the lead frame and being capable of measuring acceleration applied to an ambient environment thereof, and a housing mounted to protect at least a part of the lead frame, the pressure sensing element, and the acceleration sensor module, including a reference medium inlet hole to apply a pressure of a reference medium to the first part, and including a target medium inlet hole to apply a pressure of a target medium to the second part.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 24, 2020
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Ja Guen Gu, Hyang Won Kang
  • Patent number: 10840564
    Abstract: According to an aspect of the present invention, there is provided a battery protection circuit module including a first positive terminal and a first negative terminal electrically connected to electrode terminals of a battery bare cell, a second positive terminal and a second negative terminal electrically connected to a charger or an electronic device, a first protection circuit unit including a first single field-effect transistor connected between at least one of the first positive and negative terminals and at least one of the second positive and negative terminals, and a first protection integrated circuit (P-IC) for controlling the first single field-effect transistor, and a second protection circuit unit including a second single field-effect transistor connected between at least one of the first positive and negative terminals and at least one of the second positive and negative terminals, and a second P-IC for controlling the second single field-effect transistor.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: November 17, 2020
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn
  • Patent number: 10756550
    Abstract: According to an aspect of the present invention, there is provided a battery protection circuit module including a first positive terminal and a first negative terminal electrically connected to electrode terminals of a battery bare cell, a second positive terminal and a second negative terminal electrically connected to a charger or an electronic device, a single field-effect transistor including a drain terminal, a source terminal, a gate terminal, and a well terminal, wherein the drain terminal is electrically connected to the first negative terminal and the source terminal is electrically connected to the second negative terminal, and a protection integrated circuit (P-IC) for controlling charging/discharging of the battery bare cell by controlling the gate terminal to control whether to switch on the single field-effect transistor and controlling a bias voltage of the well terminal by using an internal switch.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: August 25, 2020
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn
  • Patent number: 10648880
    Abstract: Provided are a pressure sensor device and a method of manufacturing the same. The pressure sensor device includes a housing including an air inlet and a fluid inlet provided in different directions, a substrate provided in an inner space of the housing and including a through-hole through which the air passes, and a pressure sensor chip mounted on the substrate to cover the through-hole in such a manner that a pressure of a fluid flowing in from the fluid inlet is applied to a top surface thereof and a bottom surface thereof is exposed to the air through the through-hole, in order to measure the pressure of the fluid relative to a pressure of the air, wherein the inner space is divided into an upper region and a lower region with respect to the substrate, and wherein the upper region is divided into a first inner region in which the pressure sensor chip is provided and a second inner region through which the air passes.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: May 12, 2020
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Ja Guen Gu, Hyang Won Kang
  • Patent number: 10283981
    Abstract: A protection IC includes a bias output terminal connected to a back gate of a MOS transistor, a load side terminal connected to a power supply path between a load and the MOS transistor, a load side switch inserted in an electric current path connecting the bias output terminal and the load side terminal, and a control circuit configured to control the load side switch based on a state of a secondary battery and thereby cause a back gate control signal for controlling a voltage of the back gate to be output from the bias output terminal. The load side switch is formed on an N-type silicon substrate and includes at least two NMOS transistors whose drains are connected to each other, and the control circuit is configured to simultaneously turn on or turn off the two NMOS transistors based on the state of the secondary battery.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: May 7, 2019
    Assignees: MITSUMI ELECTRIC CO., LTD., ITM Semiconductor Co., Ltd.
    Inventors: Shuhei Abe, Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn
  • Patent number: 10263238
    Abstract: Provided are a battery protection circuit module package capable of achieving high integration and size reduction, and a battery pack and an electronic device including the same. The battery protection circuit module package includes a lead frame including a plurality of leads space apart from each other, and capable of being coupled and electrically connected to electrode tabs of a battery cell, battery protection circuit devices mounted on the lead frame and including a positive temperature coefficient (PTC) structure, and an encapsulant for encapsulating the battery protection circuit devices to expose a part of the lead frame.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: April 16, 2019
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hoseok Hwang, Youngseok Kim, Sunghee Lee, Seongbeom Park, Sanghoon Ahn, Taehwan Jeong, Seunguk Park, Jaeku Park, Younggeun Yoon, Hyunsuck Lee, Sunghee Wang
  • Patent number: 10193193
    Abstract: A battery pack includes a battery protection circuit module package coupled with a holder. The protection circuit module includes a basic package including a lead frame having a plurality of leads spaced apart from each other, and protection circuit elements provided on the lead frame, and an encapsulant and a holder simultaneously produced by disposing the basic package in a first injection mold and injecting a resin melt into the first injection mold to perform an insert injection molding process. The encapsulant encapsulates the protection circuit elements to expose parts of the lead frame, wherein the encapsulant and the basic package configure the battery protection circuit module package, and wherein the holder is coupled to the battery protection circuit module package due to the insert injection molding process.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: January 29, 2019
    Assignee: ITM SEMICONDUCTOR CO., LTD
    Inventors: Hyeokhwi Na, Hoseok Hwang, Jongun Bach, Hyangwon Kang, Seungyong Park, Sungho Song, Dawoon Jung
  • Patent number: 10109731
    Abstract: A power MOSFET includes an insulating layer, a first conductivity type doping layer situated on a bottom of the insulating layer, a second conductivity type body situated on a bottom of the first conductivity type doping layer, a gate electrode adjacent to the bottom of the insulating layer and covered with an insulating film in other regions and projected to penetrate the second conductivity type body, and a source electrode including a first region situated on a top of the insulating layer and a second region in contact with the first conductivity type doping layer by penetrating the insulating layer.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: October 23, 2018
    Assignees: Magnachip Semiconductor, Ltd., ITM Semiconductor Co., Ltd.
    Inventors: Soo Chang Kang, Seung Hyun Kim, Yong Won Lee, Ho Seok Hwang, Sang Hoon Ahn
  • Patent number: 10090690
    Abstract: A secondary battery protection circuit includes a first terminal connected to a power supply path between a secondary battery and a MOS transistor, a second terminal connected to the power supply path between a load and the MOS transistor, a third terminal connected to a gate of the MOS transistor, a fourth terminal connected to a back gate of the MOS transistor, a control circuit that outputs a switch control signal based on a detected abnormal state of the secondary battery, and a switch control circuit including a first switch for connecting the fourth terminal with the first terminal and a second switch for connecting the fourth terminal with the second terminal. At least one of the resistance between the fourth terminal and the first terminal and the resistance between the fourth terminal and the second terminal is greater than the on resistance value of the MOS transistor.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: October 2, 2018
    Assignees: MITSUMI ELECTRIC CO., LTD., ITM Semiconductor Co., Ltd.
    Inventors: Shuhei Abe, Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn
  • Patent number: 9787111
    Abstract: Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: October 10, 2017
    Assignee: ITM SEMICONDUCTOR CO., LTD
    Inventors: Hyeok Hwi Na, Ho Suk Hwang, Young Seok Kim, Sung Beum Park, Sang Hoon Ahn, Tae Hwan Jung, Seung Uk Park, Jae Ku Park, Hyun Mok Cho, Min Ho Park, Young Geun Yoon, Seong Ho Ju, Young Nam Ji, Myoung Ki Moon, Hyun Suck Lee, Ji Young Park
  • Patent number: 9767450
    Abstract: Provided is an antenna module package including a substrate, a wireless card payment antenna structure mounted on the substrate and including a first antenna chip and wireless card payment matching elements electrically connected to the first antenna chip, a near field communication (NFC) antenna structure mounted on the substrate, sharing the first antenna chip, and including an extended NFC antenna loop and NFC matching elements electrically connected to the first antenna chip, and a wireless charging antenna structure mounted on the substrate and including a second antenna chip, and an extended wireless charging antenna loop and wireless charging matching elements electrically connected to the second antenna chip.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: September 19, 2017
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyeok Hwi Na, Ho Seok Hwang, Young Seok Kim, Seong Beom Park, Sang Hoon Ahn, Sun Ho Kim
  • Patent number: D930588
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: September 14, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
  • Patent number: D932436
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: October 5, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
  • Patent number: D932437
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: October 5, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
  • Patent number: D932438
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: October 5, 2021
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee