Abstract: A phase change memory with a primary memory array, a reference memory array, and a comparison circuit is provided. The electrical characteristic curve of the recording layers of the primary memory units, is different from the electrical characteristic curve of the recording layers of the reference memory units. The primary memory array includes at least one primary memory unit to generate at least one sensing signal, wherein each of the primary memory units includes at least one recording layer can be programmed to a first resistance and a second resistance. The reference memory array includes at least one reference memory unit to generate at least, one reference signal, wherein each of the reference memory units includes at least one recording layer can be programmed to change its resistance. The comparison circuit compares the sensing signal and the reference signal to generate a comparison result.

Abstract: A system and method are disclosed for adapting the rate of a data terminal equipment having a V-series type interface connected to an integrated services digital network which supports more than two simultaneous communications. A V.110 rate adapter is provided which receives user data at a user data rate from the data terminal equipment and outputs a bitstream containing the user data at a B-channel data rate. A fractional rate adapter is also provided which receives this bitstream and outputs a second bitstream at a lower subchannel data rate using a bit discarding technique.