Patents Assigned to IXYS Semiconductor GmbH
-
Patent number: 11811180Abstract: Provided herein are semiconductor packages with improved electrical contacts (e.g. pins). In some embodiments, an assembly may include a substrate and an electrical contact coupled to the substrate, the electrical contact consisting of a first component defined by a complex 3D designed receiving pin. The electrical contact may further include a second component defined by another complex 3D designed penetrating pin, wherein the first component engages the second component to deform mechanically and to weld when the first component and the second component are coupled together.Type: GrantFiled: August 31, 2021Date of Patent: November 7, 2023Assignee: IXYS Semiconductor GmbHInventors: Yong Ai-Ong, Thomas Spann
-
Publication number: 20220085525Abstract: Provided herein are semiconductor packages with improved electrical contacts (e.g. pins). In some embodiments, an assembly may include a substrate and an electrical contact coupled to the substrate, the electrical contact consisting of a first component defined by a complex 3D designed receiving pin. The electrical contact may further include a second component defined by another complex 3D designed penetrating pin, wherein the first component engages the second component to deform mechanically and to weld when the first component and the second component are coupled together.Type: ApplicationFiled: August 31, 2021Publication date: March 17, 2022Applicant: IXYS Semiconductor GmbHInventors: Yong Ai-Ong, Thomas Spann
-
Patent number: 9790130Abstract: A method of joining a metal-ceramic substrate having metallization on at least one side to a metal body by using metal alloy is disclosed. The metal body has a thickness of less than 1.0 mm and the metal alloy contains aluminum and has a liquidus temperature of greater than 450° C. The resulting metal-ceramic module provides a strong bond between the metal body and the ceramic substrate. The resulting module is useful as a circuit carrier in electronic appliances, with the metal body preferably functioning as a cooling body.Type: GrantFiled: May 29, 2012Date of Patent: October 17, 2017Assignee: IXYS Semiconductor GmbHInventor: Heiko Knoll
-
Patent number: 9210818Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.Type: GrantFiled: March 24, 2015Date of Patent: December 8, 2015Assignee: IXYS Semiconductor GmbHInventors: Olaf Zschieschang, Andreas Laschek-Enders
-
Patent number: 9042103Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.Type: GrantFiled: May 16, 2012Date of Patent: May 26, 2015Assignee: IXYS Semiconductor GmbHInventors: Olaf Zschieschang, Andreas Laschek-Enders
-
Patent number: 8876996Abstract: The invention relates to a method for the manufacture of double-sided metallized ceramic substrates according to the direct-bonding process. The method enables a ceramic substrate to be bonded to a metal plate or foil on the upper side and the underside in only one process sequence. The composite to be bonded is located on a specially designed carrier structured on the upper side with a plurality of contact points. After the bonding process the composite of metal plates and ceramic substrate can be detached from the carrier free of any residue.Type: GrantFiled: June 10, 2011Date of Patent: November 4, 2014Assignee: IXYS Semiconductor GmbHInventors: Werner Weidenauer, Thomas Spann, Heiko Knoll
-
Publication number: 20130021759Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.Type: ApplicationFiled: May 16, 2012Publication date: January 24, 2013Applicant: IXYS Semiconductor GmbHInventors: Olaf Zschieschang, Andreas Laschek-Enders
-
Publication number: 20120305281Abstract: A method of joining a metal-ceramic substrate having metallization on at least one side to a metal body by using metal alloy is disclosed. The metal body has a thickness of less than 1.0 mm and the metal alloy contains aluminium and has a liquidus temperature of greater than 450° C. The resulting metal-ceramic module provides a strong bond between the metal body and the ceramic substrate. The resulting module is useful as a circuit carrier in electronic appliances, with the metal body preferably functioning as cooling body.Type: ApplicationFiled: May 29, 2012Publication date: December 6, 2012Applicant: IXYS Semiconductor GmbHInventor: Heiko Knoll
-
Publication number: 20110303348Abstract: The invention relates to a method for the manufacture of double-sided metallized ceramic substrates according to the direct-bonding process. The method enables a ceramic substrate to be bonded to a metal plate or foil on the upper side and the underside in only one process sequence. The composite to be bonded is located on a specially designed carrier structured on the upper side with a plurality of contact points. After the bonding process the composite of metal plates and ceramic substrate can be detached from the carrier free of any residue.Type: ApplicationFiled: June 10, 2011Publication date: December 15, 2011Applicant: IXYS Semiconductor GmbHInventors: Werner Weidenauer, Thomas Spann, Heiko Knoll
-
Publication number: 20060267185Abstract: The invention relates to an encapsulated power semiconductor assembly comprising a substrate consisting of an insulation material (ceramic), provided with a plurality of islands, which are composed of a thermal conductive material, in particular of partial surfaces of a metal layer. Power semiconductor chips are soldered onto said islands. Electric connections that run from the chips to the connecting elements are produced in the form of bonding pads on additional islands or in the form of wires and islands that are configured as printed conductors. The substrate and the chips are encapsulated, whereas the connection elements project beyond said encapsulation and the metallic underside of the substrate is exposed in order to be fastened to a heat sink.Type: ApplicationFiled: April 8, 2004Publication date: November 30, 2006Applicant: IXYS SEMICONDUCTOR GMBHInventor: Andreas Lindemann
-
Patent number: 7030426Abstract: In a power semiconductor component produced in a planar technique, a near-surface structure having at least one depression is formed in a surface region of an edge termination adjacent a main surface of the semiconductor body. The structure lies inside a space charge region formed when a voltage is applied at a junction between semiconductor regions of opposite conduction type. Dielectric material may fill the depression and form a passivation layer on the surface region. The depression may be an annular trench having a width to depth ratio ?1. Alternatively, the structure may be waffle-shaped with multiple depressions.Type: GrantFiled: March 14, 2005Date of Patent: April 18, 2006Assignee: IXYS Semiconductor GmbHInventor: Arno Neidig
-
Publication number: 20050212075Abstract: In a power semiconductor component produced in a planar technique, a near-surface structure having at least one depression is formed in a surface region of an edge termination adjacent a main surface of the semiconductor body. The structure lies inside a space charge region formed when a voltage is applied at a junction between semiconductor regions of opposite conduction type. Dielectric material may fill the depression and form a passivation layer on the surface region. The depression may be an annular trench having a width to depth ratio ?1. Alternatively, the structure may be waffle-shaped with multiple depressions.Type: ApplicationFiled: March 14, 2005Publication date: September 29, 2005Applicant: IXYS Semiconductor GmbHInventor: Arno Neidig
-
Patent number: 6507108Abstract: The invention relates to a power semiconductor module (10) having a baseplate (1) on which at least one substrate (13) is arranged which is fitted with power semiconductor chips (11, 12) and can be pressed via pressure elements and contact cords (17) against the baseplate (1). The baseplate (1) has centering elements on which a frame (3) which defines fields (7) and is in the form of a grid is provided, with corresponding substrates (13) with power semiconductor chips being arranged in at least some of the fields (7), which substrates (13) can be made contact with via contact rails (15).Type: GrantFiled: September 7, 2000Date of Patent: January 14, 2003Assignee: IXYS Semiconductor GmbHInventors: Andreas Lindemann, Bernt Leukel
-
Patent number: 5699232Abstract: A power semiconductor module includes a plastic housing having a bottom plane in which a substrate is disposed. Disposed inside the module are the substrate, structures on the substrate, a rubber-like soft encapsulation and a hard encapsulation above the soft encapsulation. Internal struts of the housing extend into the soft encapsulation and, if appropriate, have ends with transverse extensions disposed within the soft encapsulation. The effect of this module construction is that a back pressure or reaction opposes forces acting externally on the substrate.Type: GrantFiled: December 26, 1995Date of Patent: December 16, 1997Assignee: Ixys Semiconductor GmbHInventors: Arno Neidig, Peter Kinzel