Patents Assigned to JBCR Innovations
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Patent number: 7138289Abstract: A multilayer color-sensing photodetector is fabricated in a semiconductor wafer having a single crystal structure to form a first, second and third layer of single crystal semiconductor material. A dielectric layer is formed that completely surrounds each single crystal region. A blocking layer is applied to prevent ion implantation where not desired. Ions are implanted into a predefined implant area. The semiconductor wafer is heated to create a dielectric layer part way through the single crystal semiconductor region. The second layer of single crystal semiconductor materials is formed by depositing a single crystal or polycrystalline material and annealing it to form a single crystal semiconductor. The deposited semiconductor layer is masked and etched to obtain single crystal regions directly above the previous layer. A blocking layer is applied and an ion implant is performed. After heating, there is left a region of single crystal silicon that has its sides and bottom surrounding by a dielectric border.Type: GrantFiled: July 7, 2004Date of Patent: November 21, 2006Assignee: JBCR Innovations, LLPInventors: Richard A. Blanchard, Richard K. Robinson
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Patent number: 7094621Abstract: A single crystal semiconductor region is fabricated in a semiconductor wafer. The region is either cantilevered, supported at one or both ends, or midpoint, or supported at multiple locations. After a pattern and etch step, a dielectric fill step is performed to define the boundaries of the region in the semiconductor wafer. Oxygen or nitrogen is implanted in the semiconductor wafer on a surface area of the semiconductor wafer that corresponds to a top surface of the region. The annealing of the oxygen or nitrogen ions convert the silicon to an oxide or a nitride beneath the surface area. The silicon dioxide or silicon nitride is etched away to produce a semiconducting region of a single crystal material.Type: GrantFiled: September 15, 2004Date of Patent: August 22, 2006Assignee: JBCR Innovations, L.L.P.Inventor: Richard A. Blanchard
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Patent number: 7061072Abstract: An integrated circuit is disclosed that includes a semiconductor substrate having a major body portion with a conductive layer having a predefined boundary and located on a first surface of the major body portion. An insulating layer is located over the conductive layer, over which an integrated inductor is located. An amplifier is connected between the integrated inductor and the conductive layer.Type: GrantFiled: October 3, 2003Date of Patent: June 13, 2006Assignee: JBCR Innovations, LLPInventors: Richard A. Blanchard, Michael J. Callahan
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Patent number: 6812056Abstract: A single crystal semiconductor region is fabricated in a semiconductor wafer. The region is either cantilevered, supported at one or both ends, or midpoint, or supported at multiple locations. After a pattern and etch step, a dielectric fill step is performed to define the boundaries of the region in the semiconductor wafer. Oxygen or nitrogen is implanted in the semiconductor wafer on a surface area of the semiconductor wafer that corresponds to a top surface of the region. The annealing of the oxygen or nitrogen ions convert the silicon to an oxide or a nitride beneath the surface area. The silicon dioxide or silicon nitride is etched away to produce a semiconducting region of a single crystal material.Type: GrantFiled: March 5, 2003Date of Patent: November 2, 2004Assignee: JBCR Innovations, Inc.Inventor: Richard A. Blanchard
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Patent number: 6790745Abstract: A method for manufacturing a semiconductor device comprising of the steps of creating an oxide layer on a first surface of an epitaxial layer having damage layer located at a predetermined depth from the first surface, the damaged layer being in parallel alignment with the first surface. Then, using the oxide layer as a masked, etch the epitaxial layer to create a plurality of pillars, the plurality of pillars being enclosed in a first area of the top surface of the epitaxial layer, the first area having a predefine perimeter and the plurality of pillars being separated from each other by inner trenches and from the perimeter by a perimeter trench, the inner trenches and perimeter trench extend from the first surface to at least the predetermined depth of damaged layer. Form an oxide layer that coats the pillars, fills the perimeter trench and coats the sides and bottoms of the inner trenches prior to removing the oxide layer from at least the sidewalls and bottom of the inner trenches.Type: GrantFiled: December 15, 2003Date of Patent: September 14, 2004Assignee: JBCR InnovationsInventor: Richard A. Blanchard
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Patent number: 6730963Abstract: A semiconductor device is disclosed and includes a drain region of a first conductivity type, having a first major surface. Diffused into the drain region is a body region of a second conductivity type. A source region is diffused in the body region and it has a general polygonal shape when viewed at the first major surface with two notches directed towards the center of the source region from opposite sides. The body region is accessible through the notches. An oxide layer covers the source and body regions except for a contact opening position over the source region between the two notches exposing only that portion of the source region that is between the two notches and at least a portion of the accessible body region in each of the two notches to facilitate a source contact.Type: GrantFiled: October 2, 2002Date of Patent: May 4, 2004Assignee: JBCR Innovations, LLPInventor: Richard A. Blanchard