Patents Assigned to Jerrold Electronics Corp.
  • D.C.-coupled video clamping circuit
    Patent number: 4688097
    Abstract: A d.c.-coupled video clamping circuit is disclosed for operation with normal video signals and sync suppressed scrambled video signals. For receiving normal video signals, a feedback path detects variations in sync tip level from a reference level and applies a corresponding control voltage to a d.c. signal amplifier, thereby to clamp and maintain the sync tip at a fixed (black) level. For receiving sync suppressed scrambled video signals, the feedback path is disabled and a fixed reference voltage is applied to the d.c. signal amplifier.
    Type: Grant
    Filed: October 30, 1986
    Date of Patent: August 18, 1987
    Assignee: Jerrold Electronics Corp.
    Inventor: Wen T. Lin
  • Digital channel selection and fine tuning system
    Patent number: 4298988
    Abstract: A tuning system for use in a radio frequency multi-signal receiving system, e.g., for CATV converters, utilizes a closed feedback loop digital arrangement for channel selection (local oscillator frequency control) and channel fine tuning. The system may be implemented either via discrete hardware or through the use of microprocessor controlled apparatus.In accordance with one aspect of the present invention, double heterodyne tuning apparatus automatically compensates for frequency drift in the second local oscillator.
    Type: Grant
    Filed: August 10, 1979
    Date of Patent: November 3, 1981
    Assignee: Jerrold Electronics Corp.
    Inventor: Charles L. Dages
  • Modular radio frequency amplifier having a gain variable by external passive component selection
    Patent number: 4112386
    Abstract: A broad-band radio-frequency amplifier is characterized by a gain which may be adjusted over a relatively large range, and which remains stable over the range of gain adjustments. The amplifier includes first and second transistor pairs each arranged in a cascode connection; a feedback capacitor connected across the output and input of each cascode pair; and inductance serially included at selected circuit points. Also disclosed is a hybrid circuit for efficiently implementing the amplifier.
    Type: Grant
    Filed: February 14, 1977
    Date of Patent: September 5, 1978
    Assignee: Jerrold Electronics Corp.
    Inventors: Norman Everhart, Dieter Bruno Brauer