Abstract: A method and apparatus for asynchronously controlling a DRAM array in an SRAM environment is described. In on embodiment, this is a method of arbitrating between a refresh request and an access request. Furthermore, the access request may be either a read or a write request. Moreover, the request may be generated by a refresh control circuit within a circuit implementing the asynchronous control method. In an alternate embodiment, this is an apparatus. The apparatus includes an arbitration circuit block which may receive a refresh request and an access request. Furthermore, the access request may come as a read request or a write request, which may be implemented as separate signals. Moreover, the apparatus may include a refresh circuit block which may generate refresh control signals and the refresh request signal for the arbitration circuit.

Abstract: A method and apparatus for sense amplification is disclosed. In one embodiment, this is a method of amplifying signals in a DRAM including sharing charge between a cell and a first conductor of a first pair of complementary conductors; and driving a voltage of the first conductor of the first pair and a voltage of a second conductor of the first pair in the same direction relative to a power supply voltage. In an alternate embodiment, this is an apparatus. The apparatus includes a first transistor having a first terminal, a second terminal and a gate. The apparatus also includes a second transistor having a first terminal, a second terminal and a gate, the gate of the second transistor coupled to the first terminal of the first transistor, the first terminal of the second transistor coupled to the gate of the first transistor.