Abstract: An electron extraction type free-wheeling diode device and a preparation method thereof are provided by the present disclosure, and more than one first structures for increasing the density of electron extraction pathways are provided on a N-type drift region. Each of the first structures includes a lightly doped P-type base region, a heavily doped N-type emitter region located on the lightly doped P-type base region, a P-type trench anode region, and a trench region located on the P-type trench anode region. The barrier height of the punch-through NPN triode can be tuned in a wide range, which has beneficial effects on soft and fast adjustment of the reverse recovery process.
Abstract: A trench gate silicon carbide metal oxide semiconductor field effect transistor (MOSFET) device and a fabrication method thereof. A second conductive heavily doped layer at the bottom corner of a trench gate is electrically connected to a second conductive heavily doped layer on another side edge of the trench gate through a layout design, which ensures a ground potential during voltage blocking state. This design protects the insulating layer in the trench gate and the Schottky contact in a junction barrier Schottky (JBS) diode, thereby enhancing device reliability. Moreover, in a diode operating mode, P+ on the left and right sides of the trench gate are connected to a positive potential. When the P+/N? junction is activated, the conductivity modulation can be implemented through hole injection, thereby improving the device's ability to withstand surge current impacts.
Type:
Grant
Filed:
November 5, 2024
Date of Patent:
February 25, 2025
Assignee:
JSAB TECHNOLOGIES (SHENZHEN) LTD.
Inventors:
Yong Liu, Hao Feng, Xin Peng, Johnny Kin On Sin
Abstract: The present disclosure provides a power semiconductor device and a manufacturing method thereof. In order to provide a power semiconductor device with improved latch-up immunity but without increasing device power loss and costs, a hole current path in a fourth semiconductor region of a first conductivity type between a gate trench and a dummy gate trench is shortened by providing a first contact trench between two adjacent gate trenches, and providing a second contact trench between the gate trench and a dummy gate trench such that the width and depth of the second contact trench are respectively greater than those of the first contact trench. The effect of the hole current on the potential rise of the fourth semiconductor region of the first conductivity type is suppressed, thereby suppressing the latch-up effect, and enhancing the switching reliability.
Type:
Grant
Filed:
October 30, 2023
Date of Patent:
April 23, 2024
Assignee:
JSAB TECHNOLOGIES (SHENZHEN) LTD.
Inventors:
Hao Feng, Yong Liu, Jing Deng, Johnny Kin On Sin
Abstract: A power semiconductor device comprising a first metal electrode and a second metal electrode formed on a first substrate surface of a semiconductor substrate, a semi-insulating field plate interconnecting said first and second metal electrodes, and an insulating oxide layer extending between said first and second metal electrodes and between said field plate and said semiconductor substrate, wherein said semi-insulating field plate is a titanium nitride (TiN) field plate.
Type:
Grant
Filed:
December 10, 2014
Date of Patent:
May 9, 2017
Assignee:
JSAB TECHNOLOGIES LIMITED
Inventors:
Johnny Kin-On Sin, Iftikhar Ahmed, Chun-Wai Ng