Abstract: A method of and an arrangement for determining electric connections at a printed circuit board between boundary-scan compliant circuit terminals of one or more boundary-scan compliant devices. An electronic processing unit retrieves properties of the or each boundary-scan compliant device and a list comprising boundary-scan cells operable as a driver and/or sensor. Based on this list, a boundary-scan cell connected to a circuit terminal is operated as a driver, and at least one other boundary-scan cell connected to another circuit terminal is operated as a sensor. Data from the boundary-scan register, comprising the driver and sensor data, is stored in a storage device. The steps of operating boundary-scan cells as driver and sensor are repeated for a plurality of cells. The data stored are analyzed for determining electric connections. A result of the analysis is presented.

Abstract: A method of and an arrangement for testing connections on a printed circuit board between boundary-scan compliant circuit terminals of one or more boundary-scan compliant devices mounted at the printed circuit board and comprising a boundary-scan register of boundary-scan cells of the boundary-scan compliant circuit terminals. Under control of an electronic processing unit, boundary-scan properties of the or each boundary-scan compliant device are retrieved, a list comprising boundary-scan compliant circuit terminals is displayed, and a selection of at least a first and second boundary-scan compliant circuit terminal is received. Based on this selection, a boundary-scan cell of a first boundary-scan compliant circuit terminal of a boundary-scan compliant device is operated as a driver and a boundary-scan cell of a second boundary-scan compliant circuit terminal of a boundary-scan compliant device is operated as a sensor. The driver is controlled through data provided to the boundary-scan register.

Abstract: There is disclosed a control device for interfacing between a test machine and electronic circuitry under test. The test machine generates a pattern that is composited with background data in a predetermined configuration. Each output bit is specified as either foreground or background through an indicator memory. Foreground data and background data are put at their intended positions while using a barrel shifter, decompressing means and an output multiplexer. After the test, a counterpart procedure is used for extracting exclusively relevant data at the expense of dummy data.